Add a generic timer driver.

Author: thejpster

cortex-r-examples/src/bin/generic_timer.rs

@@ -0,0 +1,73 @@
+//! Generic-timer example for Arm Cortex-R52
+
+#![no_std]
+#![no_main]
+
+// pull in our start-up code
+use cortex_r::generic_timer::{El1PhysicalTimer, El1VirtualTimer, GenericTimer};
+use cortex_r_examples as _;
+
+use semihosting::println;
+
+/// The entry-point to the Rust application.
+///
+/// It is called by the start-up code in `cortex-m-rt`.
+#[no_mangle]
+pub extern "C" fn kmain() {
+    if let Err(e) = main() {
+        panic!("main returned {:?}", e);
+    }
+    semihosting::process::exit(0);
+}
+
+/// The main function of our Rust application.
+///
+/// Called by [`kmain`].
+fn main() -> Result<(), core::fmt::Error> {
+    let cntfrq = cortex_r::register::Cntfrq::read().0;
+    println!("cntfrq = {:.03} MHz", cntfrq as f32 / 1_000_000.0);
+
+    let delay_ticks = cntfrq * 2;
+
+    let mut pgt = unsafe { El1PhysicalTimer::new() };
+    let mut vgt = unsafe { El1VirtualTimer::new() };
+
+    let pgt_ref: &mut dyn GenericTimer = &mut pgt;
+    let vgt_ref: &mut dyn GenericTimer = &mut vgt;
+
+    for (timer, name) in [(pgt_ref, "physical"), (vgt_ref, "virtual")] {
+        println!("Using {} timer ************************", name);
+
+        println!("Print five, one per second...");
+        for i in 0..5 {
+            println!("i = {}", i);
+            timer.delay_ms(1000);
+        }
+
+        let now = timer.counter();
+        println!("{} is now: {}", name, now);
+        println!("Waiting for {} {} ticks to count up...", delay_ticks, name);
+        timer.counter_compare_set(now + delay_ticks as u64);
+        timer.enable(true);
+        while !timer.interrupt_status() {
+            core::hint::spin_loop();
+        }
+        println!("Matched! {} count now {}", name, timer.counter());
+
+        println!(
+            "Waiting for {} {} ticks to count down...",
+            delay_ticks, name
+        );
+        timer.countdown_set(delay_ticks);
+        while !timer.interrupt_status() {
+            core::hint::spin_loop();
+        }
+        println!(
+            "{} countdown hit zero! (and is now {})",
+            name,
+            timer.countdown() as i32
+        );
+    }
+
+    Ok(())
+}

cortex-r/src/generic_timer/el0.rs

@@ -0,0 +1,140 @@
+//! Code and types for Generic Timer support at EL0 on Armv8-R.
+
+use crate::register;
+
+/// Represents our Generic Timer when we are running at EL0.
+///
+/// Note that for most of these APIs to work, EL0 needs to have been granted
+/// access using methods like
+/// [El2GenericTimer::el0_access_physical_counter](crate::generic_timer::El2GenericTimer::el0_access_physical_counter).
+pub struct El0PhysicalTimer();
+
+impl El0PhysicalTimer {
+    /// Create an EL0 Timer handle for the Physical Timer.
+    ///
+    /// EL2/EL1 has to grant permission for EL0 to use the Physical Timer, so
+    /// check they did that.
+    ///
+    /// # Safety
+    ///
+    /// Only create one of these at any given time, as they access shared
+    /// mutable state within the processor and do read-modify-writes on that
+    /// state.
+    pub unsafe fn new() -> El0PhysicalTimer {
+        El0PhysicalTimer()
+    }
+}
+
+impl super::GenericTimer for El0PhysicalTimer {
+    fn frequency_hz(&self) -> u32 {
+        register::Cntfrq::read().0
+    }
+
+    fn counter(&mut self) -> u64 {
+        register::CntPct::read().0
+    }
+
+    fn counter_compare(&mut self) -> u64 {
+        register::CntpCval::read().0
+    }
+
+    fn counter_compare_set(&mut self, value: u64) {
+        register::CntpCval::write(register::CntpCval(value))
+    }
+
+    fn countdown(&self) -> u32 {
+        register::CntpTval::read().0
+    }
+
+    fn countdown_set(&mut self, duration_ticks: u32) {
+        register::CntpTval::write(register::CntpTval(duration_ticks))
+    }
+
+    fn enabled(&self) -> bool {
+        register::CntpCtl::read().enable()
+    }
+
+    fn enable(&self, enabled: bool) {
+        register::CntpCtl::modify(|r| {
+            r.set_enable(enabled);
+        });
+    }
+
+    fn interrupt_masked(&self) -> bool {
+        register::CntpCtl::read().imask()
+    }
+
+    fn interrupt_mask(&mut self, mask: bool) {
+        register::CntpCtl::modify(|r| {
+            r.set_imask(mask);
+        });
+    }
+
+    fn interrupt_status(&self) -> bool {
+        register::CntpCtl::read().istatus()
+    }
+}
+
+pub struct El0VirtualTimer();
+
+impl El0VirtualTimer {
+    /// Create an EL0 Timer handle for the Virtual Timer.
+    ///
+    /// # Safety
+    ///
+    /// Only create one of these at any given time, as they access shared
+    /// mutable state within the processor and do read-modify-writes on that state.
+    pub unsafe fn new() -> El0VirtualTimer {
+        El0VirtualTimer()
+    }
+}
+
+impl super::GenericTimer for El0VirtualTimer {
+    fn frequency_hz(&self) -> u32 {
+        register::Cntfrq::read().0
+    }
+
+    fn counter(&mut self) -> u64 {
+        register::CntVct::read().0
+    }
+
+    fn counter_compare(&mut self) -> u64 {
+        register::CntvCval::read().0
+    }
+
+    fn counter_compare_set(&mut self, value: u64) {
+        register::CntvCval::write(register::CntvCval(value))
+    }
+
+    fn countdown(&self) -> u32 {
+        register::CntvTval::read().0
+    }
+
+    fn countdown_set(&mut self, duration_ticks: u32) {
+        register::CntvTval::write(register::CntvTval(duration_ticks))
+    }
+
+    fn enabled(&self) -> bool {
+        register::CntvCtl::read().enable()
+    }
+
+    fn enable(&self, enabled: bool) {
+        register::CntvCtl::modify(|r| {
+            r.set_enable(enabled);
+        });
+    }
+
+    fn interrupt_masked(&self) -> bool {
+        register::CntvCtl::read().imask()
+    }
+
+    fn interrupt_mask(&mut self, mask: bool) {
+        register::CntvCtl::modify(|r| {
+            r.set_imask(mask);
+        });
+    }
+
+    fn interrupt_status(&self) -> bool {
+        register::CntvCtl::read().istatus()
+    }
+}

cortex-r/src/generic_timer/el1.rs

@@ -0,0 +1,180 @@
+//! Code and types for Generic Timer support at EL1 on Armv8-R.
+
+use crate::register;
+
+use super::{El0PhysicalTimer, El0VirtualTimer, GenericTimer};
+
+/// Represents our Physical Timer when we are running at EL1.
+pub struct El1PhysicalTimer(pub(crate) El0PhysicalTimer);
+
+impl El1PhysicalTimer {
+    /// Create an EL1 Generic Timer handle
+    ///
+    /// # Safety
+    ///
+    /// Only create one of these at any given time, as they access shared
+    /// mutable state within the processor and do read-modify-writes on that state.
+    pub unsafe fn new() -> El1PhysicalTimer {
+        unsafe { El1PhysicalTimer(El0PhysicalTimer::new()) }
+    }
+
+    /// Control whether user code at EL0 can access the physical counter.
+    pub fn el0_access_physical_counter(&mut self, access: bool) {
+        register::Cntkctl::modify(|r| {
+            r.set_el0pcten(access);
+        });
+    }
+
+    /// Control whether user code at EL0 can access the physical timer.
+    pub fn el0_access_physical_timer(&mut self, access: bool) {
+        register::Cntkctl::modify(|r| {
+            r.set_el0pten(access);
+        });
+    }
+}
+
+impl GenericTimer for El1PhysicalTimer {
+    fn frequency_hz(&self) -> u32 {
+        self.0.frequency_hz()
+    }
+
+    fn counter(&mut self) -> u64 {
+        self.0.counter()
+    }
+
+    fn counter_compare(&mut self) -> u64 {
+        self.0.counter_compare()
+    }
+
+    fn counter_compare_set(&mut self, value: u64) {
+        self.0.counter_compare_set(value)
+    }
+
+    fn countdown(&self) -> u32 {
+        self.0.countdown()
+    }
+
+    fn countdown_set(&mut self, duration_ticks: u32) {
+        self.0.countdown_set(duration_ticks)
+    }
+
+    fn enabled(&self) -> bool {
+        self.0.enabled()
+    }
+
+    fn enable(&self, enabled: bool) {
+        self.0.enable(enabled)
+    }
+
+    fn interrupt_masked(&self) -> bool {
+        self.0.interrupt_masked()
+    }
+
+    fn interrupt_mask(&mut self, mask: bool) {
+        self.0.interrupt_mask(mask)
+    }
+
+    fn interrupt_status(&self) -> bool {
+        self.0.interrupt_status()
+    }
+}
+
+/// Represents our Virtual Timer when we are running at EL1.
+pub struct El1VirtualTimer(El0VirtualTimer);
+
+impl El1VirtualTimer {
+    /// Create an EL1 Generic Timer handle
+    ///
+    /// # Safety
+    ///
+    /// Only create one of these at any given time, as they access shared
+    /// mutable state within the processor and do read-modify-writes on that state.
+    pub unsafe fn new() -> El1VirtualTimer {
+        unsafe { El1VirtualTimer(El0VirtualTimer::new()) }
+    }
+
+    /// Control whether user code at EL0 can access the virtual counter.
+    pub fn el0_access_virtual_counter(&mut self, access: bool) {
+        register::Cntkctl::modify(|r| {
+            r.set_el0vcten(access);
+        });
+    }
+
+    /// Control whether user code at EL0 can access the virtual timer.
+    pub fn el0_access_virtual_timer(&mut self, access: bool) {
+        register::Cntkctl::modify(|r| {
+            r.set_el0vten(access);
+        });
+    }
+
+    /// Configure an event stream from the virtual counter.
+    ///
+    /// The event stream is tied to one of the bottom 16 bits of the virtual
+    /// counter. If you select the bottom (0th) bit, the event fires every
+    /// counter tick. If you select the 3rd bit, the event fires every 2^3 = 8
+    /// counter ticks.
+    ///
+    /// This is useful if you want to ensure that a WFE instruction can never
+    /// wait forever; effectively it allows you to put a timeout on a WFE.
+    ///
+    /// Pass None to disable.
+    pub fn virtual_event_stream_configure(&mut self, event_config: Option<&super::EventConfig>) {
+        if let Some(event_config) = event_config {
+            register::Cntkctl::modify(|r| {
+                r.set_evnti(arbitrary_int::u4::from_u8(event_config.rate as u8));
+                r.set_evntdir(event_config.evntdir == super::EventDir::HighLow);
+                r.set_evnten(true);
+            });
+        } else {
+            register::Cntkctl::modify(|r| {
+                r.set_evnten(false);
+            });
+        }
+    }
+}
+
+impl GenericTimer for El1VirtualTimer {
+    fn frequency_hz(&self) -> u32 {
+        self.0.frequency_hz()
+    }
+
+    fn counter(&mut self) -> u64 {
+        self.0.counter()
+    }
+
+    fn counter_compare(&mut self) -> u64 {
+        self.0.counter_compare()
+    }
+
+    fn counter_compare_set(&mut self, value: u64) {
+        self.0.counter_compare_set(value)
+    }
+
+    fn countdown(&self) -> u32 {
+        self.0.countdown()
+    }
+
+    fn countdown_set(&mut self, duration_ticks: u32) {
+        self.0.countdown_set(duration_ticks)
+    }
+
+    fn enabled(&self) -> bool {
+        self.0.enabled()
+    }
+
+    fn enable(&self, enabled: bool) {
+        self.0.enable(enabled)
+    }
+
+    fn interrupt_masked(&self) -> bool {
+        self.0.interrupt_masked()
+    }
+
+    fn interrupt_mask(&mut self, mask: bool) {
+        self.0.interrupt_mask(mask)
+    }
+
+    fn interrupt_status(&self) -> bool {
+        self.0.interrupt_status()
+    }
+}