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Fix the exception handlers. #27
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af3fce8
Fix the undef handler.
jonathanpallant 2c603d9
Split the prefetch-exception handler into two.
jonathanpallant 59e5b64
Extra clarification in abt-exception.
jonathanpallant 16ac516
Add extra exception tests for Cortex-R52
jonathanpallant 260ed09
More exception handling updates.
thejpster 22f1eb9
Merge pull request #28 from thejpster/fix-undef-handler
jonathanpallant 55bc8ad
Fix cortex-a-rt docs title.
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9 changes: 9 additions & 0 deletions
9
examples/mps3-an536/reference/abt-exception-armv8r-none-eabihf.out
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,9 @@ | ||
| Hello, this is an data abort exception example | ||
| data abort occurred | ||
| DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0010 Status=0b00001 } | ||
| DFSR Status: Ok(AlignmentFault) | ||
| DFAR (Faulting Address Register): Dfar(4097) | ||
| data abort occurred | ||
| DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0010 Status=0b00001 } | ||
| DFSR Status: Ok(AlignmentFault) | ||
| DFAR (Faulting Address Register): Dfar(4097) |
11 changes: 11 additions & 0 deletions
11
examples/mps3-an536/reference/prefetch-exception-a32-armv8r-none-eabihf.out
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,11 @@ | ||
| Hello, this is a prefetch exception example | ||
| prefetch abort occurred | ||
| IFSR (Fault Status Register): IFSR { ext=false Domain=0b0010 Status=0b00010 } | ||
| IFSR Status: Ok(DebugEvent) | ||
| IFAR (Faulting Address Register): Ifar(0) | ||
| caught bkpt_from_a32 | ||
| prefetch abort occurred | ||
| IFSR (Fault Status Register): IFSR { ext=false Domain=0b0010 Status=0b00010 } | ||
| IFSR Status: Ok(DebugEvent) | ||
| IFAR (Faulting Address Register): Ifar(0) | ||
| caught bkpt_from_a32 |
11 changes: 11 additions & 0 deletions
11
examples/mps3-an536/reference/prefetch-exception-t32-armv8r-none-eabihf.out
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,11 @@ | ||
| Hello, this is a prefetch exception example | ||
| prefetch abort occurred | ||
| IFSR (Fault Status Register): IFSR { ext=false Domain=0b0010 Status=0b00010 } | ||
| IFSR Status: Ok(DebugEvent) | ||
| IFAR (Faulting Address Register): Ifar(0) | ||
| caught bkpt_from_t32 | ||
| prefetch abort occurred | ||
| IFSR (Fault Status Register): IFSR { ext=false Domain=0b0010 Status=0b00010 } | ||
| IFSR Status: Ok(DebugEvent) | ||
| IFAR (Faulting Address Register): Ifar(0) | ||
| caught bkpt_from_t32 |
5 changes: 5 additions & 0 deletions
5
examples/mps3-an536/reference/undef-exception-a32-armv8r-none-eabihf.out
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,5 @@ | ||
| Hello, this is a undef exception example | ||
| undefined abort occurred | ||
| caught udf_from_a32 | ||
| undefined abort occurred | ||
| caught udf_from_a32 |
5 changes: 5 additions & 0 deletions
5
examples/mps3-an536/reference/undef-exception-t32-armv8r-none-eabihf.out
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,5 @@ | ||
| Hello, this is a undef exception example | ||
| undefined abort occurred | ||
| caught udf_from_t32 | ||
| undefined abort occurred | ||
| caught udf_from_t32 |
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This will clobber the
lrthat was returned by_undefined_handler, right? The advertised API suggests the callee can cause the handler to return to an arbitrary new instruction, andmov lr, r0and associated comment appear to be trying to support that, but that register move is then discarded here and replaced with the value that was pushed beforesave_context.There was a problem hiding this comment.
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Yes, that's a bug. I added support for returning a new location because I realised that sometimes you want to emulate the faulting instruction and return to the one after. But I didn't write a test for it and this is what happens when you don't test things. Thank you for checking so diligently!
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See #29