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More exception handling updates. #28

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Merged
merged 1 commit into from
Apr 9, 2025
Merged

More exception handling updates. #28

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36 changes: 18 additions & 18 deletions cortex-a-rt/link.x
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Original file line number Diff line number Diff line change
Expand Up @@ -17,8 +17,6 @@ SECTIONS {
.text : {
/* The vector table must come first */
*(.vector_table)
/* Our exception handling routines */
*(.text.handlers)
/* Now the rest of the code */
*(.text .text*)
} > CODE
Expand Down Expand Up @@ -72,36 +70,38 @@ SECTIONS {
}

/*
We reserve some space at the top of the RAM for our stacks. We have an IRQ stack
and a FIQ stack, plus the remainder is our system stack.
We reserve some space at the top of the RAM for our exception stacks. The
remainder is our system mode stack.

You must keep _stack_top and the stack sizes aligned to eight byte boundaries.
*/
PROVIDE(_stack_top = ORIGIN(DATA) + LENGTH(DATA));
PROVIDE(_fiq_stack_size = 0x400);
PROVIDE(_irq_stack_size = 0x1000);
PROVIDE(_abt_stack_size = 0x400);
PROVIDE(_und_stack_size = 0x400);
PROVIDE(_svc_stack_size = 0x1000);
PROVIDE(_svc_stack_size = 0x400);
PROVIDE(_abt_stack_size = 0x400);
PROVIDE(_irq_stack_size = 0x400);
PROVIDE(_fiq_stack_size = 0x400);

ASSERT(_stack_top % 8 == 0, "ERROR(cortex-a-rt): top of stack is not 8-byte aligned");
ASSERT(_fiq_stack_size % 8 == 0, "ERROR(cortex-a-rt): size of FIQ stack is not 8-byte aligned");
ASSERT(_irq_stack_size % 8 == 0, "ERROR(cortex-a-rt): size of IRQ stack is not 8-byte aligned");
ASSERT(_fiq_stack_size % 8 == 0, "ERROR(cortex-a-rt): size of FIQ stack is not 8-byte aligned");
ASSERT(_abt_stack_size % 8 == 0, "ERROR(cortex-a-rt): size of ABT stack is not 8-byte aligned");
ASSERT(_und_stack_size % 8 == 0, "ERROR(cortex-a-rt): size of UND stack is not 8-byte aligned");
ASSERT(_svc_stack_size % 8 == 0, "ERROR(cortex-a-rt): size of SVC stack is not 8-byte aligned");
ASSERT(_stack_top % 8 == 0, "ERROR(cortex-r-rt): top of stack is not 8-byte aligned");
ASSERT(_und_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of UND stack is not 8-byte aligned");
ASSERT(_svc_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of SVC stack is not 8-byte aligned");
ASSERT(_abt_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of ABT stack is not 8-byte aligned");
ASSERT(_irq_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of IRQ stack is not 8-byte aligned");
ASSERT(_fiq_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of FIQ stack is not 8-byte aligned");

/* Weak aliases for ASM default handlers */
PROVIDE(_start =_default_start);
PROVIDE(_asm_undefined_handler =_asm_default_undefined_handler);
PROVIDE(_asm_svc_handler =_asm_default_svc_handler);
PROVIDE(_asm_prefetch_handler =_asm_default_prefetch_handler);
PROVIDE(_asm_abort_handler =_asm_default_abort_handler);
PROVIDE(_asm_irq_handler =_asm_default_irq_handler);
PROVIDE(_asm_fiq_handler =_asm_default_fiq_handler);

/* Weak aliases for C default handlers */
PROVIDE(_undefined_handler =_default_handler);
PROVIDE(_abort_handler =_default_handler);
PROVIDE(_svc_handler =_default_handler);
PROVIDE(_prefetch_handler =_default_handler);
PROVIDE(_abort_handler =_default_handler);
PROVIDE(_irq_handler =_default_handler);
PROVIDE(_svc_handler =_default_handler);
PROVIDE(_start =_default_start);
/* There is no default C-language FIQ handler */
365 changes: 215 additions & 150 deletions cortex-a-rt/src/lib.rs
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30 changes: 15 additions & 15 deletions cortex-r-rt/link.x
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -17,8 +17,6 @@ SECTIONS {
.text : {
/* The vector table must come first */
*(.vector_table)
/* Our exception handling routines */
*(.text.handlers)
/* Now the rest of the code */
*(.text .text*)
} > CODE
Expand Down Expand Up @@ -72,36 +70,38 @@ SECTIONS {
}

/*
We reserve some space at the top of the RAM for our stacks. We have an IRQ stack
and a FIQ stack, plus the remainder is our system stack.
We reserve some space at the top of the RAM for our exception stacks. The
remainder is our system mode stack.

You must keep _stack_top and the stack sizes aligned to eight byte boundaries.
*/
PROVIDE(_stack_top = ORIGIN(DATA) + LENGTH(DATA));
PROVIDE(_fiq_stack_size = 0x400);
PROVIDE(_irq_stack_size = 0x1000);
PROVIDE(_abt_stack_size = 0x400);
PROVIDE(_und_stack_size = 0x400);
PROVIDE(_svc_stack_size = 0x1000);
PROVIDE(_svc_stack_size = 0x400);
PROVIDE(_abt_stack_size = 0x400);
PROVIDE(_irq_stack_size = 0x400);
PROVIDE(_fiq_stack_size = 0x400);

ASSERT(_stack_top % 8 == 0, "ERROR(cortex-r-rt): top of stack is not 8-byte aligned");
ASSERT(_fiq_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of FIQ stack is not 8-byte aligned");
ASSERT(_irq_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of IRQ stack is not 8-byte aligned");
ASSERT(_fiq_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of FIQ stack is not 8-byte aligned");
ASSERT(_abt_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of ABT stack is not 8-byte aligned");
ASSERT(_und_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of UND stack is not 8-byte aligned");
ASSERT(_svc_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of SVC stack is not 8-byte aligned");
ASSERT(_abt_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of ABT stack is not 8-byte aligned");
ASSERT(_irq_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of IRQ stack is not 8-byte aligned");
ASSERT(_fiq_stack_size % 8 == 0, "ERROR(cortex-r-rt): size of FIQ stack is not 8-byte aligned");

/* Weak aliases for ASM default handlers */
PROVIDE(_start =_default_start);
PROVIDE(_asm_undefined_handler =_asm_default_undefined_handler);
PROVIDE(_asm_svc_handler =_asm_default_svc_handler);
PROVIDE(_asm_prefetch_handler =_asm_default_prefetch_handler);
PROVIDE(_asm_abort_handler =_asm_default_abort_handler);
PROVIDE(_asm_irq_handler =_asm_default_irq_handler);
PROVIDE(_asm_fiq_handler =_asm_default_fiq_handler);

/* Weak aliases for C default handlers */
PROVIDE(_undefined_handler =_default_handler);
PROVIDE(_abort_handler =_default_handler);
PROVIDE(_svc_handler =_default_handler);
PROVIDE(_prefetch_handler =_default_handler);
PROVIDE(_abort_handler =_default_handler);
PROVIDE(_irq_handler =_default_handler);
PROVIDE(_svc_handler =_default_handler);
PROVIDE(_start =_default_start);
/* There is no default C-language FIQ handler */
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