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add DMB function in ASM module #38

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Merged
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May 31, 2025
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add DMB function in ASM module #38

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4 changes: 4 additions & 0 deletions cortex-ar/CHANGELOG.md
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Expand Up @@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

## [Unreleased]

### Added

- `dmb` data memory barrier in ASM module.

## [v0.2.0]

### Added
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14 changes: 14 additions & 0 deletions cortex-ar/src/asm.rs
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Expand Up @@ -2,6 +2,20 @@

use core::sync::atomic::{compiler_fence, Ordering};

/// Data Memory Barrier
///
/// Ensures that all explicit memory accesses that appear in program order before the `DMB`
/// instruction are observed before any explicit memory accesses that appear in program order
/// after the `DMB` instruction.
#[inline]
pub fn dmb() {
compiler_fence(Ordering::SeqCst);
unsafe {
core::arch::asm!("dmb", options(nostack, preserves_flags));
}
compiler_fence(Ordering::SeqCst);
}

/// Data Synchronization Barrier
///
/// Acts as a special kind of memory barrier. No instruction in program order after this instruction
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