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1 parent 49a6dae commit e6f511aCopy full SHA for e6f511a
src/peripheral/dcb.rs
@@ -4,7 +4,7 @@ use volatile_register::{RW, WO};
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use peripheral::DCB;
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-const BIT_TRACENA: u8 = 24;
+const BIT_TRACENA: u32 = 0x01 << 24;
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/// Register block
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#[repr(C)]
@@ -26,12 +26,12 @@ impl DCB {
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/// soft-reset, only on power reset.
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pub fn enable_trace(&mut self) {
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// set bit 24 / TRACENA
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- unsafe { self.demcr.modify(|w| w | (0x01 << BIT_TRACENA)); }
+ unsafe { self.demcr.modify(|w| w | BIT_TRACENA); }
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}
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/// Disables TRACE. See `DCB::enable_trace()` for more details
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pub fn disable_trace(&mut self) {
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// unset bit 24 / TRACENA
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- unsafe { self.demcr.modify(|w| w & !(0x01 << BIT_TRACENA)); }
+ unsafe { self.demcr.modify(|w| w & !BIT_TRACENA); }
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