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Remove inline-asm feature and update MSRV to 1.59
1 parent 396fb9b commit 7804439

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9 files changed

+23
-133
lines changed

9 files changed

+23
-133
lines changed

.github/bors.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@ delete_merged_branches = true
33
required_approvals = 1
44
status = [
55
"ci-linux (stable)",
6-
"ci-linux (1.42.0)",
6+
"ci-linux (1.59.0)",
77
"build-other (macOS-latest)",
88
"build-other (windows-latest)",
99
"Rustfmt"

.github/workflows/ci.yaml

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,8 @@ jobs:
1111
continue-on-error: ${{ matrix.experimental || false }}
1212
strategy:
1313
matrix:
14-
# All generated code should be running on stable now, MRSV is 1.42.0
15-
rust: [nightly, stable, 1.42.0]
14+
# All generated code should be running on stable now, MRSV is 1.59.0
15+
rust: [nightly, stable, 1.59.0]
1616

1717
include:
1818
# Nightly is only for reference and allowed to fail
@@ -34,12 +34,6 @@ jobs:
3434
run: cargo check --target x86_64-unknown-linux-gnu
3535
- name: Run CI script for riscv32imac-unknown-none-elf under ${{ matrix.rust }}
3636
run: cargo check --target riscv32imac-unknown-none-elf
37-
- name: Run CI script for riscv32imac-unknown-none-elf (inline-asm) under ${{ matrix.rust }}
38-
run: |
39-
# asm! requires Rust 1.59
40-
if [ "${{ matrix.rust }}" != "1.42.0" ]; then
41-
cargo check --target riscv32imac-unknown-none-elf --features inline-asm
42-
fi
4337
- name: Run CI script for riscv64imac-unknown-none-elf under ${{ matrix.rust }}
4438
run: cargo check --target riscv64imac-unknown-none-elf
4539
- name: Run CI script for riscv64gc-unknown-none-elf under ${{ matrix.rust }}

CHANGELOG.md

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,13 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
1919
### Changed
2020

2121
- Use new `asm!` instead of `llvm_asm!`
22-
- Change `pmpcfgx::read()` macro to `read_csr_as!()` from `read_csr_as_usize!()`
22+
- Change `pmpcfgx::read()` macro to `read_csr_as!()` from `read_csr_as_usize!()`
23+
- Inline assembly is now always used
24+
- Update Minimum Supported Rust Version to 1.59
25+
26+
### Removed
27+
28+
- Remove `inline-asm` feature which is now always enabled
2329

2430
## [v0.7.0] - 2020-07-29
2531

Cargo.toml

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
[package]
22
name = "riscv"
33
version = "0.7.0"
4+
rust-version = "1.59"
45
repository = "https://github.com/rust-embedded/riscv"
56
authors = ["The RISC-V Team <[email protected]>"]
67
categories = ["embedded", "hardware-support", "no-std"]
@@ -19,9 +20,3 @@ targets = [
1920
bare-metal = "1.0.0"
2021
bit_field = "0.10.0"
2122
embedded-hal = "0.2.6"
22-
23-
[build-dependencies]
24-
riscv-target = "0.1.2"
25-
26-
[features]
27-
inline-asm = []

README.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ This project is developed and maintained by the [RISC-V team][team].
1212

1313
## Minimum Supported Rust Version (MSRV)
1414

15-
This crate is guaranteed to compile on stable Rust 1.42.0 and up. It *might*
15+
This crate is guaranteed to compile on stable Rust 1.59 and up. It *might*
1616
compile with older versions but that may change in any new patch release.
1717

1818
## License

build.rs

Lines changed: 1 addition & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1,31 +1,7 @@
1-
extern crate riscv_target;
2-
3-
use riscv_target::Target;
4-
use std::path::PathBuf;
5-
use std::{env, fs};
1+
use std::env;
62

73
fn main() {
84
let target = env::var("TARGET").unwrap();
9-
let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap());
10-
let name = env::var("CARGO_PKG_NAME").unwrap();
11-
12-
if target.starts_with("riscv") && env::var_os("CARGO_FEATURE_INLINE_ASM").is_none() {
13-
let mut target = Target::from_target_str(&target);
14-
target.retain_extensions("ifdc");
15-
16-
let target = target.to_string();
17-
// capture riscvNNxxxxx only
18-
let target = target.split("-").next().unwrap();
19-
20-
fs::copy(
21-
format!("bin/{}.a", target),
22-
out_dir.join(format!("lib{}.a", name)),
23-
)
24-
.unwrap();
25-
26-
println!("cargo:rustc-link-lib=static={}", name);
27-
println!("cargo:rustc-link-search={}", out_dir.display());
28-
}
295

306
if target.starts_with("riscv32") {
317
println!("cargo:rustc-cfg=riscv");

src/asm.rs

Lines changed: 3 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -6,18 +6,9 @@ macro_rules! instruction {
66
#[inline]
77
pub unsafe fn $fnname() {
88
match () {
9-
#[cfg(all(riscv, feature = "inline-asm"))]
9+
#[cfg(riscv)]
1010
() => core::arch::asm!($asm),
1111

12-
#[cfg(all(riscv, not(feature = "inline-asm")))]
13-
() => {
14-
extern "C" {
15-
fn $asm_fn();
16-
}
17-
18-
$asm_fn();
19-
}
20-
2112
#[cfg(not(riscv))]
2213
() => unimplemented!(),
2314
}
@@ -62,18 +53,9 @@ instruction!(
6253
#[allow(unused_variables)]
6354
pub unsafe fn sfence_vma(asid: usize, addr: usize) {
6455
match () {
65-
#[cfg(all(riscv, feature = "inline-asm"))]
56+
#[cfg(riscv)]
6657
() => core::arch::asm!("sfence.vma {0}, {1}", in(reg) addr, in(reg) asid),
6758

68-
#[cfg(all(riscv, not(feature = "inline-asm")))]
69-
() => {
70-
extern "C" {
71-
fn __sfence_vma(addr: usize, asid: usize);
72-
}
73-
74-
__sfence_vma(addr, asid);
75-
}
76-
7759
#[cfg(not(riscv))]
7860
() => unimplemented!(),
7961
}
@@ -92,7 +74,7 @@ pub unsafe fn sfence_vma(asid: usize, addr: usize) {
9274
#[allow(unused_variables)]
9375
pub unsafe fn delay(cycles: u32) {
9476
match () {
95-
#[cfg(all(riscv, feature = "inline-asm"))]
77+
#[cfg(riscv)]
9678
() => {
9779
let real_cyc = 1 + cycles / 2;
9880
core::arch::asm!(
@@ -103,15 +85,6 @@ pub unsafe fn delay(cycles: u32) {
10385
)
10486
}
10587

106-
#[cfg(all(riscv, not(feature = "inline-asm")))]
107-
() => {
108-
extern "C" {
109-
fn __delay(cycles: u32);
110-
}
111-
112-
__delay(cycles);
113-
}
114-
11588
#[cfg(not(riscv))]
11689
() => unimplemented!(),
11790
}

src/lib.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
//!
33
//! # Minimum Supported Rust Version (MSRV)
44
//!
5-
//! This crate is guaranteed to compile on stable Rust 1.42 and up. It *might*
5+
//! This crate is guaranteed to compile on stable Rust 1.59 and up. It *might*
66
//! compile with older versions but that may change in any new patch release.
77
//!
88
//! # Features

src/register/macros.rs

Lines changed: 6 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -4,22 +4,13 @@ macro_rules! read_csr {
44
#[inline]
55
unsafe fn _read() -> usize {
66
match () {
7-
#[cfg(all(riscv, feature = "inline-asm"))]
7+
#[cfg(riscv)]
88
() => {
99
let r: usize;
1010
core::arch::asm!(concat!("csrrs {0}, ", stringify!($csr_number), ", x0"), out(reg) r);
1111
r
1212
}
1313

14-
#[cfg(all(riscv, not(feature = "inline-asm")))]
15-
() => {
16-
extern "C" {
17-
fn $asm_fn() -> usize;
18-
}
19-
20-
$asm_fn()
21-
}
22-
2314
#[cfg(not(riscv))]
2415
() => unimplemented!(),
2516
}
@@ -33,22 +24,13 @@ macro_rules! read_csr_rv32 {
3324
#[inline]
3425
unsafe fn _read() -> usize {
3526
match () {
36-
#[cfg(all(riscv32, feature = "inline-asm"))]
27+
#[cfg(riscv32)]
3728
() => {
3829
let r: usize;
3930
core::arch::asm!(concat!("csrrs {0}, ", stringify!($csr_number), ", x0"), out(reg) r);
4031
r
4132
}
4233

43-
#[cfg(all(riscv32, not(feature = "inline-asm")))]
44-
() => {
45-
extern "C" {
46-
fn $asm_fn() -> usize;
47-
}
48-
49-
$asm_fn()
50-
}
51-
5234
#[cfg(not(riscv32))]
5335
() => unimplemented!(),
5436
}
@@ -101,18 +83,9 @@ macro_rules! write_csr {
10183
#[allow(unused_variables)]
10284
unsafe fn _write(bits: usize) {
10385
match () {
104-
#[cfg(all(riscv, feature = "inline-asm"))]
86+
#[cfg(riscv)]
10587
() => core::arch::asm!(concat!("csrrw x0, ", stringify!($csr_number), ", {0}"), in(reg) bits),
10688

107-
#[cfg(all(riscv, not(feature = "inline-asm")))]
108-
() => {
109-
extern "C" {
110-
fn $asm_fn(bits: usize);
111-
}
112-
113-
$asm_fn(bits);
114-
}
115-
11689
#[cfg(not(riscv))]
11790
() => unimplemented!(),
11891
}
@@ -127,18 +100,9 @@ macro_rules! write_csr_rv32 {
127100
#[allow(unused_variables)]
128101
unsafe fn _write(bits: usize) {
129102
match () {
130-
#[cfg(all(riscv32, feature = "inline-asm"))]
103+
#[cfg(riscv32)]
131104
() => core::arch::asm!(concat!("csrrw x0, ", stringify!($csr_number), ", {0}"), in(reg) bits),
132105

133-
#[cfg(all(riscv32, not(feature = "inline-asm")))]
134-
() => {
135-
extern "C" {
136-
fn $asm_fn(bits: usize);
137-
}
138-
139-
$asm_fn(bits);
140-
}
141-
142106
#[cfg(not(riscv32))]
143107
() => unimplemented!(),
144108
}
@@ -177,18 +141,9 @@ macro_rules! set {
177141
#[allow(unused_variables)]
178142
unsafe fn _set(bits: usize) {
179143
match () {
180-
#[cfg(all(riscv, feature = "inline-asm"))]
144+
#[cfg(riscv)]
181145
() => core::arch::asm!(concat!("csrrs x0, ", stringify!($csr_number), ", {0}"), in(reg) bits),
182146

183-
#[cfg(all(riscv, not(feature = "inline-asm")))]
184-
() => {
185-
extern "C" {
186-
fn $asm_fn(bits: usize);
187-
}
188-
189-
$asm_fn(bits);
190-
}
191-
192147
#[cfg(not(riscv))]
193148
() => unimplemented!(),
194149
}
@@ -203,18 +158,9 @@ macro_rules! clear {
203158
#[allow(unused_variables)]
204159
unsafe fn _clear(bits: usize) {
205160
match () {
206-
#[cfg(all(riscv, feature = "inline-asm"))]
161+
#[cfg(riscv)]
207162
() => core::arch::asm!(concat!("csrrc x0, ", stringify!($csr_number), ", {0}"), in(reg) bits),
208163

209-
#[cfg(all(riscv, not(feature = "inline-asm")))]
210-
() => {
211-
extern "C" {
212-
fn $asm_fn(bits: usize);
213-
}
214-
215-
$asm_fn(bits);
216-
}
217-
218164
#[cfg(not(riscv))]
219165
() => unimplemented!(),
220166
}

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