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riscv: make mcycle & minstret high bits writable
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riscv/src/register/mcycleh.rs

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//! mcycleh register
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read_csr_as_usize_rv32!(0xB80);
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write_csr_as_usize_rv32!(0xB80);

riscv/src/register/minstreth.rs

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//! minstreth register
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read_csr_as_usize_rv32!(0xB82);
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write_csr_as_usize_rv32!(0xB82);

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