Svd2rust regress fixes

CHANGELOG.md

@@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/).
 - Force using rust edition 2021 in CI
 - Added lifetime ellision for `FieldWriter` where the explicit lifetimes are not necessary, which
   fixes the `clippy::needless_lifetimes` warning on rustc 1.84
+- Some fixes for the `svd2rust-regress` tool and update of its documentation
 
 ## [v0.35.0] - 2024-11-12
 

ci/svd2rust-regress/README.md

@@ -40,36 +40,11 @@ If all test cases passed, the return code will be `0`. If any test cases failed,
 
 ### Options
 
-Here are the options for running `svd2rust-regress`:
-
+You can display options for `svd2rust-regress` by running:
 
 ```text
-svd2rust-regress 0.1.0
-James Munns <[email protected]>:The svd2rust developers
-
-USAGE:
-    svd2rust-regress [FLAGS] [OPTIONS]
-
-FLAGS:
-    -b, --bad-tests    Include tests expected to fail (will cause a non-zero return code)
-    -f, --format       Enable formatting with `rustfmt`
-    -h, --help         Prints help information
-    -l, --long-test    Run a long test (it's very long)
-    -V, --version      Prints version information
-    -v, --verbose      Use verbose output
-
-OPTIONS:
-    -a, --architecture <arch>
-            Filter by architecture, case sensitive, may be combined with other filters Options are: "CortexM", "RiscV", "Msp430", "Mips" and "XtensaLX"
-    -p, --svd2rust-path <bin_path>
-            Path to an `svd2rust` binary, relative or absolute. Defaults to `target/release/svd2rust[.exe]` of this
-            repository (which must be already built)
-    -c, --chip <chip>                            Filter by chip name, case sensitive, may be combined with other filters
-    -m, --manufacturer <mfgr>
-            Filter by manufacturer, case sensitive, may be combined with other filters
-
-        --rustfmt_bin_path <rustfmt_bin_path>
-            Path to an `rustfmt` binary, relative or absolute. Defaults to `$(rustup which rustfmt)`
+# in the ci/svd2rust-regress folder
+cargo regress help
 ```
 
 ### Filters
@@ -80,28 +55,16 @@ For example, to run all `RiscV` tests:
 
 ```bash
 # in the ci/svd2rust-regress folder
-cargo run --release -- -a RiscV
-    Finished release [optimized] target(s) in 0.0 secs
-     Running `target/release/svd2rust-regress -a RiscV`
-Passed: si_five_e310x - 7 seconds
+cargo regress tests --architecture riscv
 ```
 
 To run against any chip named `MB9AF12xK`:
 
 ```bash
-cargo run --release -- --long-test -c MB9AF12xK
-    Finished release [optimized] target(s) in 0.0 secs
-     Running `target/release/svd2rust-regress --long-test -c MB9AF12xK`
-Passed: spansion_mb9af12x_k - 23 seconds
-Passed: fujitsu_mb9af12x_k - 25 seconds
+cargo regress test -c MB9AF12xK
 ```
 
 To run against specifically the `Fujitsu` `MB9AF12xK`:
 ```bash
-cargo run --release -- --long-test -c MB9AF12xK -m Fujitsu
-    Finished release [optimized] target(s) in 0.0 secs
-     Running `target/release/svd2rust-regress --long-test -c MB9AF12xK -m Fujitsu`
-Passed: fujitsu_mb9af12x_k - 19 seconds
+cargo regress test -c MB9AF12xK -m Fujitsu
 ```
-
-Note that you may have to pass `--long-test` to enable some chips as they are known to take a long time to compile.

ci/svd2rust-regress/src/diff.rs

@@ -257,8 +257,8 @@ impl Diffing {
         Ok([baseline, current])
     }
 
-    fn get_source_and_command<'s>(&'s self) -> [Option<(Source, Command)>; 2] {
-        let split = |s: &'s str| -> (Source, Command) {
+    fn get_source_and_command(&self) -> [Option<(Source, Command)>; 2] {
+        fn split(s: &str) -> (Source, Command) {
             if let Some(s) = s.strip_prefix('@') {
                 if let Some((source, cmd)) = s.split_once(' ') {
                     (Some(source), Some(cmd.trim()))
@@ -268,7 +268,7 @@ impl Diffing {
             } else {
                 (None, Some(s.trim()))
             }
-        };
+        }
 
         let baseline = self.baseline.as_deref().map(split);
 

ci/svd2rust-regress/src/main.rs

@@ -138,7 +138,7 @@ pub struct Test {
     #[arg(long = "svd", group = "svd_source")]
     /// Path to SVD file to test
     pub svd_file: Option<PathBuf>,
-    #[arg(long, group = "svd_source")]
+    #[arg(short = 'c', long, group = "svd_source")]
     /// Chip to use, use `--url` or `--svd-file` for another way to specify svd
     pub chip: Option<String>,
 

ci/svd2rust-regress/src/svd_test.rs

@@ -11,17 +11,22 @@ use std::{
     path::Path,
 };
 
-const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""];
+const CRATES_ALL: &[&str] = &[
+    "critical-section = {version = \"1.0\", optional = true}",
+    "vcell = \"0.1.2\"",
+];
 const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""];
 const CRATES_ATOMICS: &[&str] =
     &["portable-atomic = { version = \"0.3.16\", default-features = false }"];
-const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.6.13\""];
+const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.7\""];
 const CRATES_RISCV: &[&str] = &["riscv = \"0.12.1\"", "riscv-rt = \"0.13.0\""];
 const CRATES_XTENSALX: &[&str] = &["xtensa-lx-rt = \"0.9.0\"", "xtensa-lx = \"0.6.0\""];
 const CRATES_MIPS: &[&str] = &["mips-mcu = \"0.1.0\""];
 const PROFILE_ALL: &[&str] = &["[profile.dev]", "incremental = false"];
 const FEATURES_ALL: &[&str] = &["[features]"];
+const FEATURES_CORTEX_M: &[&str] = &["rt = [\"cortex-m-rt/device\"]"];
 const FEATURES_XTENSALX: &[&str] = &["default = [\"xtensa-lx/esp32\", \"xtensa-lx-rt/esp32\"]"];
+const WORKSPACE_EXCLUDE: &[&str] = &["[workspace]"];
 
 fn path_helper_base(base: &Path, input: &[&str]) -> PathBuf {
     input
@@ -210,10 +215,10 @@ impl TestCase {
 
         let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]);
         let mut file = OpenOptions::new()
-            .write(true)
             .append(true)
             .open(svd_toml)
             .with_context(|| "Failed to open Cargo.toml for appending")?;
+
         let crates = CRATES_ALL
             .iter()
             .chain(match &self.arch {
@@ -233,8 +238,10 @@ impl TestCase {
             .chain(FEATURES_ALL.iter())
             .chain(match &self.arch {
                 Target::XtensaLX => FEATURES_XTENSALX.iter(),
+                Target::CortexM => FEATURES_CORTEX_M.iter(),
                 _ => [].iter(),
-            });
+            })
+            .chain(WORKSPACE_EXCLUDE.iter());
         for c in crates {
             writeln!(file, "{}", c).with_context(|| "Failed to append to file!")?;
         }