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std_detect on Darwin AArch64: update features #146397

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Merged
merged 3 commits into from
Sep 22, 2025
Merged

std_detect on Darwin AArch64: update features #146397

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d8cc575
std_detect Darwin AArch64: add new-style detection for FEAT_CRC32
pthariensflame Sep 10, 2025
edc87e3
std_detect Darwin AArch64: re-alphabetize
pthariensflame Sep 14, 2025
d49f6a7
std_detect Darwin AArch64: synchronize features
pthariensflame Sep 14, 2025
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22 changes: 17 additions & 5 deletions library/std_detect/src/detect/os/darwin/aarch64.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -37,31 +37,34 @@ pub(crate) fn detect_features() -> cache::Initializer {
// Armv8.0 features not using the standard identifiers
let fp = _sysctlbyname(c"hw.optional.floatingpoint");
let asimd = _sysctlbyname(c"hw.optional.AdvSIMD");
let crc = _sysctlbyname(c"hw.optional.armv8_crc32");
let crc_old = _sysctlbyname(c"hw.optional.armv8_crc32");

// Armv8 and Armv9 features using the standard identifiers
let aes = _sysctlbyname(c"hw.optional.arm.FEAT_AES");
let bf16 = _sysctlbyname(c"hw.optional.arm.FEAT_BF16");
let bti = _sysctlbyname(c"hw.optional.arm.FEAT_BTI");
let crc = _sysctlbyname(c"hw.optional.arm.FEAT_CRC32");
let cssc = _sysctlbyname(c"hw.optional.arm.FEAT_CSSC");
let dit = _sysctlbyname(c"hw.optional.arm.FEAT_DIT");
let dotprod = _sysctlbyname(c"hw.optional.arm.FEAT_DotProd");
let dpb = _sysctlbyname(c"hw.optional.arm.FEAT_DPB");
let dpb2 = _sysctlbyname(c"hw.optional.arm.FEAT_DPB2");
let dotprod = _sysctlbyname(c"hw.optional.arm.FEAT_DotProd");
let ecv = _sysctlbyname(c"hw.optional.arm.FEAT_ECV");
let fcma = _sysctlbyname(c"hw.optional.arm.FEAT_FCMA");
let fhm = _sysctlbyname(c"hw.optional.arm.FEAT_FHM");
let fp16 = _sysctlbyname(c"hw.optional.arm.FEAT_FP16");
let frintts = _sysctlbyname(c"hw.optional.arm.FEAT_FRINTTS");
let flagm = _sysctlbyname(c"hw.optional.arm.FEAT_FlagM");
let flagm2 = _sysctlbyname(c"hw.optional.arm.FEAT_FlagM2");
let fp16 = _sysctlbyname(c"hw.optional.arm.FEAT_FP16");
let frintts = _sysctlbyname(c"hw.optional.arm.FEAT_FRINTTS");
let hbc = _sysctlbyname(c"hw.optional.arm.FEAT_HBC");
let i8mm = _sysctlbyname(c"hw.optional.arm.FEAT_I8MM");
let jsconv = _sysctlbyname(c"hw.optional.arm.FEAT_JSCVT");
let rcpc = _sysctlbyname(c"hw.optional.arm.FEAT_LRCPC");
let rcpc2 = _sysctlbyname(c"hw.optional.arm.FEAT_LRCPC2");
let lse = _sysctlbyname(c"hw.optional.arm.FEAT_LSE");
let lse2 = _sysctlbyname(c"hw.optional.arm.FEAT_LSE2");
let mte = _sysctlbyname(c"hw.optional.arm.FEAT_MTE");
let mte2 = _sysctlbyname(c"hw.optional.arm.FEAT_MTE2");
let pauth = _sysctlbyname(c"hw.optional.arm.FEAT_PAuth");
let pmull = _sysctlbyname(c"hw.optional.arm.FEAT_PMULL");
let rdm = _sysctlbyname(c"hw.optional.arm.FEAT_RDM");
Expand All @@ -72,6 +75,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
let sha512 = _sysctlbyname(c"hw.optional.arm.FEAT_SHA512");
let sme = _sysctlbyname(c"hw.optional.arm.FEAT_SME");
let sme2 = _sysctlbyname(c"hw.optional.arm.FEAT_SME2");
let sme2p1 = _sysctlbyname(c"hw.optional.arm.FEAT_SME2p1");
let sme_f64f64 = _sysctlbyname(c"hw.optional.arm.FEAT_SME_F64F64");
let sme_i16i64 = _sysctlbyname(c"hw.optional.arm.FEAT_SME_I16I64");
let ssbs = _sysctlbyname(c"hw.optional.arm.FEAT_SSBS");
Expand All @@ -87,6 +91,12 @@ pub(crate) fn detect_features() -> cache::Initializer {
let ebf16 = _sysctlbyname(c"hw.optional.arm.FEAT_EBF16");
let fpac = _sysctlbyname(c"hw.optional.arm.FEAT_FPAC");
let fpaccombine = _sysctlbyname(c"hw.optional.arm.FEAT_FPACCOMBINE");
let mte_async = _sysctlbyname(c"hw.optional.arm.FEAT_MTE_ASYNC");
let mte_canonical_tags = _sysctlbyname(c"hw.optional.arm.FEAT_MTE_CANONICAL_TAGS");
let mte_no_address_tags = _sysctlbyname(c"hw.optional.arm.FEAT_MTE_NO_ADDRESS_TAGS");
let mte_store_only = _sysctlbyname(c"hw.optional.arm.FEAT_MTE_STORE_ONLY");
let mte3 = _sysctlbyname(c"hw.optional.arm.FEAT_MTE3");
let mte4 = _sysctlbyname(c"hw.optional.arm.FEAT_MTE4");
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Why not add to this block for the new detected features? Do the changes in this PR expose new stable surface area (I'm not super familiar with how std_detect is wired up...

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This commented out part of the list contains features that std_detect doesn’t currently keep track of; if and when any of them become trackable they should get moved to the non-commented list above. See detect/arch/aarch64.rs for the list of features that are currently tracked; it’s related to LLVM’s support for them.

As for “stable surface area”, this changes it to the extent that existing code recompiled with a new Rust release may start detecting features on AArch64 Darwin that it didn’t before, if running on a sufficiently new Apple Silicon chip. That’s the only possible change; no new symbols are exposed, nor is any program able to ask/talk about anything new it couldn’t before. It just might get different answers to those existing questions than it used to, under the above circumstances.

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Can you write up a description of what answers are different with this PR?

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@pthariensflame pthariensflame Sep 15, 2025 •
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Can you write up a description of what answers are different with this PR?

Absolutely!

The specific questions whose answers might change are all of the form is_aarch64_feature_detected!(…) executed on an Apple OS on an Arm CPU, where … is one of the following:

  • "crc": this currently returns true for all Apple Silicon chips; prior to this PR, there is a possibility that under future Apple OSes that answer could incorrectly become false. This PR ensures that it remains true for the foreseeable future, accurately reflecting the presence of this mandatory CPU feature.
  • "mte": this currently always returns false on these platforms, reflecting that no current Apple Silicon CPU supports the Memory Tagging Extension. Apple have at this point publicly announced that their incoming A19 and A19 Pro CPUs support this feature, and it’s a safe bet given the history of Apple Silicon that future chips (M5 family and onward) will also have it. Darwin now exposes a way to check for this, so after this PR Rust code running on Darwin on such a near-future CPU will accurately report true to this question.
  • "sme2p1": Similarly to "mte"’s case above, this is a feature that Darwin newly exposes a way to check for; it is version 2.1 of the Scalable Matrix Extension (SME). SME 2.0 is already exposed correctly on Apple M4/A18 family chips, and while no official word has come that A19/M5 will have SME 2.1, unofficial sources heavily suggest it, and taking advantage of the newly exposed ability to check for it is a good idea anyway.

No other uses of is_aarch64_feature_detected! are changed by this PR, and it remains entirely unaffected on all non-Darwin platforms. The only other change to the non-commented code in this PR is to alphabetize the list properly since it was a bit out of order before; that doesn’t change the functionality of the code at all. Commented code is altered to reflect that Darwin now exposes a variety of subversions and subfeatures of MTE, of which only MTE(1) and MTE2 are something is_aarch64_feature_detected! can ask about (and then only as a pair).

let pacimp = _sysctlbyname(c"hw.optional.arm.FEAT_PACIMP");
let pauth2 = _sysctlbyname(c"hw.optional.arm.FEAT_PAuth2");
let rpres = _sysctlbyname(c"hw.optional.arm.FEAT_RPRES");
Expand All @@ -111,7 +121,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
enable_feature(Feature::asimd, asimd);
enable_feature(Feature::bf16, bf16);
enable_feature(Feature::bti, bti);
enable_feature(Feature::crc, crc);
enable_feature(Feature::crc, crc_old || crc);
enable_feature(Feature::cssc, cssc);
enable_feature(Feature::dit, dit);
enable_feature(Feature::dotprod, dotprod);
Expand All @@ -130,6 +140,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
enable_feature(Feature::jsconv, jsconv);
enable_feature(Feature::lse, lse);
enable_feature(Feature::lse2, lse2);
enable_feature(Feature::mte, mte && mte2);
enable_feature(Feature::paca, pauth);
enable_feature(Feature::pacg, pauth);
enable_feature(Feature::pmull, aes && pmull);
Expand All @@ -141,6 +152,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
enable_feature(Feature::sha3, sha512 && sha3 && asimd);
enable_feature(Feature::sme, sme);
enable_feature(Feature::sme2, sme2);
enable_feature(Feature::sme2p1, sme2p1);
enable_feature(Feature::sme_f64f64, sme_f64f64);
enable_feature(Feature::sme_i16i64, sme_i16i64);
enable_feature(Feature::ssbs, ssbs);
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