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asm! support for the Xtensa architecture #147302

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5 changes: 5 additions & 0 deletions compiler/rustc_codegen_gcc/src/asm.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -732,6 +732,8 @@ fn reg_class_to_gcc(reg_class: InlineAsmRegClass) -> &'static str {
| X86InlineAsmRegClass::mmx_reg
| X86InlineAsmRegClass::tmm_reg,
) => unreachable!("clobber-only"),
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => "r",
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => "f",
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
bug!("GCC backend does not support SPIR-V")
}
Expand Down Expand Up @@ -842,6 +844,8 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
bug!("GCC backend does not support SPIR-V")
}
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => cx.type_f32(),
InlineAsmRegClass::Err => unreachable!(),
}
}
Expand Down Expand Up @@ -1033,6 +1037,7 @@ fn modifier_to_gcc(
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
bug!("LLVM backend does not support SPIR-V")
}
InlineAsmRegClass::Xtensa(_) => None,
InlineAsmRegClass::Err => unreachable!(),
}
}
6 changes: 6 additions & 0 deletions compiler/rustc_codegen_llvm/src/asm.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -278,6 +278,7 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
}
InlineAsmArch::SpirV => {}
InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => {}
InlineAsmArch::Xtensa => {}
InlineAsmArch::Bpf => {}
InlineAsmArch::Msp430 => {
constraints.push("~{sr}".to_string());
Expand Down Expand Up @@ -682,6 +683,8 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
| X86InlineAsmRegClass::kreg0
| X86InlineAsmRegClass::tmm_reg,
) => unreachable!("clobber-only"),
Xtensa(XtensaInlineAsmRegClass::freg) => "f",
Xtensa(XtensaInlineAsmRegClass::reg) => "r",
Wasm(WasmInlineAsmRegClass::local) => "r",
Bpf(BpfInlineAsmRegClass::reg) => "r",
Bpf(BpfInlineAsmRegClass::wreg) => "w",
Expand Down Expand Up @@ -787,6 +790,7 @@ fn modifier_to_llvm(
| X86InlineAsmRegClass::kreg0
| X86InlineAsmRegClass::tmm_reg,
) => unreachable!("clobber-only"),
Xtensa(_) => None,
Wasm(WasmInlineAsmRegClass::local) => None,
Bpf(_) => None,
Avr(AvrInlineAsmRegClass::reg_pair)
Expand Down Expand Up @@ -862,6 +866,8 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
| X86InlineAsmRegClass::kreg0
| X86InlineAsmRegClass::tmm_reg,
) => unreachable!("clobber-only"),
Xtensa(XtensaInlineAsmRegClass::reg) => cx.type_i32(),
Xtensa(XtensaInlineAsmRegClass::freg) => cx.type_f32(),
Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
Bpf(BpfInlineAsmRegClass::reg) => cx.type_i64(),
Bpf(BpfInlineAsmRegClass::wreg) => cx.type_i32(),
Expand Down
23 changes: 23 additions & 0 deletions compiler/rustc_span/src/symbol.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -525,6 +525,7 @@ symbols! {
async_iterator,
async_iterator_poll_next,
async_trait_bounds,
atomctl,
atomic,
atomic_and,
atomic_cxchg,
Expand Down Expand Up @@ -768,6 +769,7 @@ symbols! {
contracts_requires,
convert,
convert_identity,
coprocessor,
copy,
copy_closures,
copy_nonoverlapping,
Expand Down Expand Up @@ -954,6 +956,7 @@ symbols! {
ermsb_target_feature,
exact_div,
except,
exception,
exception_handling: "exception-handling",
exchange_malloc,
exclusive_range_pattern,
Expand All @@ -980,6 +983,7 @@ symbols! {
expr_fragment_specifier_2024,
extended_key_value_attributes,
extended_varargs_abi_support,
extendedl32r,
extern_absolute_paths,
extern_crate_item_prelude,
extern_crate_self,
Expand Down Expand Up @@ -1097,6 +1101,9 @@ symbols! {
format_argument,
format_arguments,
format_macro,
format_placeholder,
format_unsafe_arg,
fp,
framework,
freeze,
freeze_impls,
Expand Down Expand Up @@ -1170,6 +1177,7 @@ symbols! {
hexagon_target_feature,
hidden,
hide,
highpriinterrupts,
hint,
homogeneous_aggregate,
host,
Expand Down Expand Up @@ -1256,6 +1264,7 @@ symbols! {
integral,
internal,
internal_features,
interrupt,
into_async_iter_into_iter,
into_future,
into_iter,
Expand Down Expand Up @@ -1362,6 +1371,7 @@ symbols! {
lt,
m68k,
m68k_target_feature,
mac16,
macro_at_most_once_rep,
macro_attr,
macro_attributes_in_derive_output,
Expand Down Expand Up @@ -1415,6 +1425,7 @@ symbols! {
mem_variant_count,
mem_zeroed,
member_constraints,
memctl,
memory,
memtag,
message,
Expand Down Expand Up @@ -1477,6 +1488,8 @@ symbols! {
mir_unwind_unreachable,
mir_variant,
miri,
misc,
miscsr,
mmx_reg,
modifiers,
module,
Expand Down Expand Up @@ -1731,6 +1744,8 @@ symbols! {
prelude_import,
preserves_flags,
prfchw_target_feature,
prid,
primitive,
print_macro,
println_macro,
proc_dash_macro: "proc-macro",
Expand Down Expand Up @@ -2001,8 +2016,10 @@ symbols! {
rustdoc_missing_doc_code_examples,
rustfmt,
rvalue_static_promotion,
rvector,
rwpi,
s,
s32c1i,
s390x,
s390x_target_feature,
s390x_target_feature_vector,
Expand Down Expand Up @@ -2245,9 +2262,12 @@ symbols! {
thread,
thread_local,
thread_local_macro,
threadptr,
three_way_compare,
thumb2,
thumb_mode: "thumb-mode",
time,
timerint,
tmm_reg,
to_owned_method,
to_string,
Expand Down Expand Up @@ -2467,6 +2487,7 @@ symbols! {
while_let,
whole_dash_archive: "whole-archive",
width,
windowed,
windows,
windows_subsystem,
with_negative_coherence,
Expand All @@ -2490,9 +2511,11 @@ symbols! {
x87_reg,
x87_target_feature,
xer,
xloop,
xmm_reg,
xop_target_feature,
xtensa,
xtensa_target_feature,
yeet_desugar_details,
yeet_expr,
yes,
Expand Down
26 changes: 25 additions & 1 deletion compiler/rustc_target/src/asm/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -194,6 +194,7 @@ mod sparc;
mod spirv;
mod wasm;
mod x86;
mod xtensa;

pub use aarch64::{AArch64InlineAsmReg, AArch64InlineAsmRegClass};
pub use arm::{ArmInlineAsmReg, ArmInlineAsmRegClass};
Expand All @@ -213,6 +214,7 @@ pub use sparc::{SparcInlineAsmReg, SparcInlineAsmRegClass};
pub use spirv::{SpirVInlineAsmReg, SpirVInlineAsmRegClass};
pub use wasm::{WasmInlineAsmReg, WasmInlineAsmRegClass};
pub use x86::{X86InlineAsmReg, X86InlineAsmRegClass};
pub use xtensa::{XtensaInlineAsmReg, XtensaInlineAsmRegClass};

#[derive(Copy, Clone, Encodable, Decodable, Debug, Eq, PartialEq, Hash)]
pub enum InlineAsmArch {
Expand All @@ -237,6 +239,7 @@ pub enum InlineAsmArch {
SpirV,
Wasm32,
Wasm64,
Xtensa,
Bpf,
Avr,
Msp430,
Expand Down Expand Up @@ -273,7 +276,8 @@ impl InlineAsmArch {
Arch::Msp430 => Some(Self::Msp430),
Arch::M68k => Some(Self::M68k),
Arch::CSky => Some(Self::CSKY),
Arch::AmdGpu | Arch::Xtensa | Arch::Other(_) => None,
Arch::Xtensa => Some(Self::Xtensa),
Arch::AmdGpu | Arch::Other(_) => None,
}
}
}
Expand All @@ -294,6 +298,7 @@ pub enum InlineAsmReg {
Sparc(SparcInlineAsmReg),
SpirV(SpirVInlineAsmReg),
Wasm(WasmInlineAsmReg),
Xtensa(XtensaInlineAsmReg),
Bpf(BpfInlineAsmReg),
Avr(AvrInlineAsmReg),
Msp430(Msp430InlineAsmReg),
Expand All @@ -316,6 +321,7 @@ impl InlineAsmReg {
Self::Mips(r) => r.name(),
Self::S390x(r) => r.name(),
Self::Sparc(r) => r.name(),
Self::Xtensa(r) => r.name(),
Self::Bpf(r) => r.name(),
Self::Avr(r) => r.name(),
Self::Msp430(r) => r.name(),
Expand All @@ -337,6 +343,7 @@ impl InlineAsmReg {
Self::Mips(r) => InlineAsmRegClass::Mips(r.reg_class()),
Self::S390x(r) => InlineAsmRegClass::S390x(r.reg_class()),
Self::Sparc(r) => InlineAsmRegClass::Sparc(r.reg_class()),
Self::Xtensa(r) => InlineAsmRegClass::Xtensa(r.reg_class()),
Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()),
Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()),
Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()),
Expand Down Expand Up @@ -370,6 +377,7 @@ impl InlineAsmReg {
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
Self::Mips(MipsInlineAsmReg::parse(name)?)
}
InlineAsmArch::Xtensa => Self::Xtensa(XtensaInlineAsmReg::parse(name)?),
InlineAsmArch::S390x => Self::S390x(S390xInlineAsmReg::parse(name)?),
InlineAsmArch::Sparc | InlineAsmArch::Sparc64 => {
Self::Sparc(SparcInlineAsmReg::parse(name)?)
Expand Down Expand Up @@ -409,6 +417,7 @@ impl InlineAsmReg {
Self::Sparc(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::Bpf(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::Avr(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::Xtensa(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::Msp430(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::M68k(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::CSKY(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Expand All @@ -435,6 +444,7 @@ impl InlineAsmReg {
Self::Mips(r) => r.emit(out, arch, modifier),
Self::S390x(r) => r.emit(out, arch, modifier),
Self::Sparc(r) => r.emit(out, arch, modifier),
Self::Xtensa(r) => r.emit(out, arch, modifier),
Self::Bpf(r) => r.emit(out, arch, modifier),
Self::Avr(r) => r.emit(out, arch, modifier),
Self::Msp430(r) => r.emit(out, arch, modifier),
Expand All @@ -456,6 +466,7 @@ impl InlineAsmReg {
Self::Mips(_) => cb(self),
Self::S390x(r) => r.overlapping_regs(|r| cb(Self::S390x(r))),
Self::Sparc(_) => cb(self),
Self::Xtensa(_) => cb(self),
Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))),
Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))),
Self::Msp430(_) => cb(self),
Expand All @@ -482,6 +493,7 @@ pub enum InlineAsmRegClass {
Sparc(SparcInlineAsmRegClass),
SpirV(SpirVInlineAsmRegClass),
Wasm(WasmInlineAsmRegClass),
Xtensa(XtensaInlineAsmRegClass),
Bpf(BpfInlineAsmRegClass),
Avr(AvrInlineAsmRegClass),
Msp430(Msp430InlineAsmRegClass),
Expand All @@ -507,6 +519,7 @@ impl InlineAsmRegClass {
Self::Sparc(r) => r.name(),
Self::SpirV(r) => r.name(),
Self::Wasm(r) => r.name(),
Self::Xtensa(r) => r.name(),
Self::Bpf(r) => r.name(),
Self::Avr(r) => r.name(),
Self::Msp430(r) => r.name(),
Expand Down Expand Up @@ -534,6 +547,7 @@ impl InlineAsmRegClass {
Self::Sparc(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Sparc),
Self::SpirV(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::SpirV),
Self::Wasm(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Wasm),
Self::Xtensa(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Xtensa),
Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf),
Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr),
Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430),
Expand Down Expand Up @@ -564,6 +578,7 @@ impl InlineAsmRegClass {
Self::Sparc(r) => r.suggest_modifier(arch, ty),
Self::SpirV(r) => r.suggest_modifier(arch, ty),
Self::Wasm(r) => r.suggest_modifier(arch, ty),
Self::Xtensa(r) => r.suggest_modifier(arch, ty),
Self::Bpf(r) => r.suggest_modifier(arch, ty),
Self::Avr(r) => r.suggest_modifier(arch, ty),
Self::Msp430(r) => r.suggest_modifier(arch, ty),
Expand Down Expand Up @@ -594,6 +609,7 @@ impl InlineAsmRegClass {
Self::Sparc(r) => r.default_modifier(arch),
Self::SpirV(r) => r.default_modifier(arch),
Self::Wasm(r) => r.default_modifier(arch),
Self::Xtensa(r) => r.default_modifier(arch),
Self::Bpf(r) => r.default_modifier(arch),
Self::Avr(r) => r.default_modifier(arch),
Self::Msp430(r) => r.default_modifier(arch),
Expand Down Expand Up @@ -627,6 +643,7 @@ impl InlineAsmRegClass {
Self::Sparc(r) => r.supported_types(arch),
Self::SpirV(r) => r.supported_types(arch),
Self::Wasm(r) => r.supported_types(arch),
Self::Xtensa(r) => r.supported_types(arch),
Self::Bpf(r) => r.supported_types(arch),
Self::Avr(r) => r.supported_types(arch),
Self::Msp430(r) => r.supported_types(arch),
Expand Down Expand Up @@ -669,6 +686,7 @@ impl InlineAsmRegClass {
}
InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(name)?),
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(name)?),
InlineAsmArch::Xtensa => Self::Xtensa(XtensaInlineAsmRegClass::parse(name)?),
InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(name)?),
InlineAsmArch::M68k => Self::M68k(M68kInlineAsmRegClass::parse(name)?),
InlineAsmArch::CSKY => Self::CSKY(CSKYInlineAsmRegClass::parse(name)?),
Expand All @@ -692,6 +710,7 @@ impl InlineAsmRegClass {
Self::Sparc(r) => r.valid_modifiers(arch),
Self::SpirV(r) => r.valid_modifiers(arch),
Self::Wasm(r) => r.valid_modifiers(arch),
Self::Xtensa(r) => r.valid_modifiers(arch),
Self::Bpf(r) => r.valid_modifiers(arch),
Self::Avr(r) => r.valid_modifiers(arch),
Self::Msp430(r) => r.valid_modifiers(arch),
Expand Down Expand Up @@ -893,6 +912,11 @@ pub fn allocatable_registers(
wasm::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
map
}
InlineAsmArch::Xtensa => {
let mut map = xtensa::regclass_map();
xtensa::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
map
}
InlineAsmArch::Bpf => {
let mut map = bpf::regclass_map();
bpf::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
Expand Down
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