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bjorn3bjorn3
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2 files changed

+76
-88
lines changed

2 files changed

+76
-88
lines changed

‎gen_intrinsics/src/main.rs‎

Lines changed: 3 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -125,26 +125,11 @@ fn main() {
125125

126126
let code = section.data().unwrap();
127127

128-
let args = sig
129-
.inputs
130-
.iter()
131-
.map(|arg| match arg {
132-
syn::FnArg::Typed(syn::PatType { pat, .. }) => match &**pat {
133-
syn::Pat::Ident(ident) => ident.ident.to_string(),
134-
_ => unreachable!("{pat:?}"),
135-
},
136-
_ => unreachable!(),
137-
})
138-
.collect::<Vec<_>>();
128+
let arg_count = sig.inputs.len();
139129

140130
println!(" \"{link_name}\" => {{");
141-
println!(" intrinsic_args!(fx, args => ({}); intrinsic);", args.join(", "));
142-
println!(
143-
" call_asm(fx, \"{}\", &[{}], ret, &{:?});",
144-
link_name.replace('.', "__"),
145-
args.join(", "),
146-
code
147-
);
131+
println!(" assert_eq!(args.len(), {arg_count});");
132+
println!(" call_asm(fx, \"{link_name}\", args, ret, &{code:?});");
148133
println!(" }}");
149134
}
150135
}

‎src/intrinsics/llvm_aarch64.rs‎

Lines changed: 73 additions & 70 deletions
Original file line numberDiff line numberDiff line change
@@ -11,11 +11,11 @@ use crate::prelude::*;
1111
fn call_asm<'tcx>(
1212
fx: &mut FunctionCx<'_, '_, 'tcx>,
1313
name: &str,
14-
args: &[CValue<'tcx>],
14+
args: &[Spanned<mir::Operand<'tcx>>],
1515
ret: CPlace<'tcx>,
1616
code: &[u8],
1717
) {
18-
let name = format!("__rust_cranelift_{name}");
18+
let name = format!("__rust_cranelift_{}", name.replace('.', "__"));
1919

2020
let sig = Signature {
2121
params: args
@@ -34,8 +34,10 @@ fn call_asm<'tcx>(
3434
}
3535

3636
let func_ref = fx.module.declare_func_in_func(func, &mut fx.bcx.func);
37-
let mut args =
38-
args.into_iter().map(|arg| arg.force_stack(fx).0.get_addr(fx)).collect::<Vec<_>>();
37+
let mut args = args
38+
.into_iter()
39+
.map(|arg| codegen_operand(fx, &arg.node).force_stack(fx).0.get_addr(fx))
40+
.collect::<Vec<_>>();
3941
let res = CPlace::new_stack_slot(fx, ret.layout());
4042
args.push(res.to_ptr().get_addr(fx));
4143
fx.bcx.ins().call(func_ref, &args);
@@ -239,181 +241,181 @@ pub(crate) fn codegen_aarch64_llvm_intrinsic_call<'tcx>(
239241
);
240242
}*/
241243
"llvm.aarch64.neon.smax.v16i8" => {
242-
intrinsic_args!(fx, args => (a, b); intrinsic);
244+
assert_eq!(args.len(), 2);
243245
call_asm(
244246
fx,
245-
"llvm__aarch64__neon__smax__v16i8",
246-
&[a, b],
247+
"llvm.aarch64.neon.smax.v16i8",
248+
args,
247249
ret,
248250
&[0, 0, 192, 61, 33, 0, 192, 61, 0, 100, 33, 78, 64, 0, 128, 61, 192, 3, 95, 214],
249251
);
250252
}
251253
"llvm.aarch64.neon.smax.v2i32" => {
252-
intrinsic_args!(fx, args => (a, b); intrinsic);
254+
assert_eq!(args.len(), 2);
253255
call_asm(
254256
fx,
255-
"llvm__aarch64__neon__smax__v2i32",
256-
&[a, b],
257+
"llvm.aarch64.neon.smax.v2i32",
258+
args,
257259
ret,
258260
&[0, 0, 64, 253, 33, 0, 64, 253, 0, 100, 161, 14, 64, 0, 0, 253, 192, 3, 95, 214],
259261
);
260262
}
261263
"llvm.aarch64.neon.smax.v4i16" => {
262-
intrinsic_args!(fx, args => (a, b); intrinsic);
264+
assert_eq!(args.len(), 2);
263265
call_asm(
264266
fx,
265-
"llvm__aarch64__neon__smax__v4i16",
266-
&[a, b],
267+
"llvm.aarch64.neon.smax.v4i16",
268+
args,
267269
ret,
268270
&[0, 0, 64, 253, 33, 0, 64, 253, 0, 100, 97, 14, 64, 0, 0, 253, 192, 3, 95, 214],
269271
);
270272
}
271273
"llvm.aarch64.neon.smax.v4i32" => {
272-
intrinsic_args!(fx, args => (a, b); intrinsic);
274+
assert_eq!(args.len(), 2);
273275
call_asm(
274276
fx,
275-
"llvm__aarch64__neon__smax__v4i32",
276-
&[a, b],
277+
"llvm.aarch64.neon.smax.v4i32",
278+
args,
277279
ret,
278280
&[0, 0, 192, 61, 33, 0, 192, 61, 0, 100, 161, 78, 64, 0, 128, 61, 192, 3, 95, 214],
279281
);
280282
}
281283
"llvm.aarch64.neon.smax.v8i16" => {
282-
intrinsic_args!(fx, args => (a, b); intrinsic);
284+
assert_eq!(args.len(), 2);
283285
call_asm(
284286
fx,
285-
"llvm__aarch64__neon__smax__v8i16",
286-
&[a, b],
287+
"llvm.aarch64.neon.smax.v8i16",
288+
args,
287289
ret,
288290
&[0, 0, 192, 61, 33, 0, 192, 61, 0, 100, 97, 78, 64, 0, 128, 61, 192, 3, 95, 214],
289291
);
290292
}
291293
"llvm.aarch64.neon.smax.v8i8" => {
292-
intrinsic_args!(fx, args => (a, b); intrinsic);
294+
assert_eq!(args.len(), 2);
293295
call_asm(
294296
fx,
295-
"llvm__aarch64__neon__smax__v8i8",
296-
&[a, b],
297+
"llvm.aarch64.neon.smax.v8i8",
298+
args,
297299
ret,
298300
&[0, 0, 64, 253, 33, 0, 64, 253, 0, 100, 33, 14, 64, 0, 0, 253, 192, 3, 95, 214],
299301
);
300302
}
301303
"llvm.aarch64.neon.smaxp.v16i8" => {
302-
intrinsic_args!(fx, args => (a, b); intrinsic);
304+
assert_eq!(args.len(), 2);
303305
call_asm(
304306
fx,
305-
"llvm__aarch64__neon__smaxp__v16i8",
306-
&[a, b],
307+
"llvm.aarch64.neon.smaxp.v16i8",
308+
args,
307309
ret,
308310
&[0, 0, 192, 61, 33, 0, 192, 61, 0, 164, 33, 78, 64, 0, 128, 61, 192, 3, 95, 214],
309311
);
310312
}
311313
"llvm.aarch64.neon.smaxp.v2i32" => {
312-
intrinsic_args!(fx, args => (a, b); intrinsic);
314+
assert_eq!(args.len(), 2);
313315
call_asm(
314316
fx,
315-
"llvm__aarch64__neon__smaxp__v2i32",
316-
&[a, b],
317+
"llvm.aarch64.neon.smaxp.v2i32",
318+
args,
317319
ret,
318320
&[0, 0, 64, 253, 33, 0, 64, 253, 0, 164, 161, 14, 64, 0, 0, 253, 192, 3, 95, 214],
319321
);
320322
}
321323
"llvm.aarch64.neon.smaxp.v4i16" => {
322-
intrinsic_args!(fx, args => (a, b); intrinsic);
324+
assert_eq!(args.len(), 2);
323325
call_asm(
324326
fx,
325-
"llvm__aarch64__neon__smaxp__v4i16",
326-
&[a, b],
327+
"llvm.aarch64.neon.smaxp.v4i16",
328+
args,
327329
ret,
328330
&[0, 0, 64, 253, 33, 0, 64, 253, 0, 164, 97, 14, 64, 0, 0, 253, 192, 3, 95, 214],
329331
);
330332
}
331333
"llvm.aarch64.neon.smaxp.v4i32" => {
332-
intrinsic_args!(fx, args => (a, b); intrinsic);
334+
assert_eq!(args.len(), 2);
333335
call_asm(
334336
fx,
335-
"llvm__aarch64__neon__smaxp__v4i32",
336-
&[a, b],
337+
"llvm.aarch64.neon.smaxp.v4i32",
338+
args,
337339
ret,
338340
&[0, 0, 192, 61, 33, 0, 192, 61, 0, 164, 161, 78, 64, 0, 128, 61, 192, 3, 95, 214],
339341
);
340342
}
341343
"llvm.aarch64.neon.smaxp.v8i16" => {
342-
intrinsic_args!(fx, args => (a, b); intrinsic);
344+
assert_eq!(args.len(), 2);
343345
call_asm(
344346
fx,
345-
"llvm__aarch64__neon__smaxp__v8i16",
346-
&[a, b],
347+
"llvm.aarch64.neon.smaxp.v8i16",
348+
args,
347349
ret,
348350
&[0, 0, 192, 61, 33, 0, 192, 61, 0, 164, 97, 78, 64, 0, 128, 61, 192, 3, 95, 214],
349351
);
350352
}
351353
"llvm.aarch64.neon.smaxp.v8i8" => {
352-
intrinsic_args!(fx, args => (a, b); intrinsic);
354+
assert_eq!(args.len(), 2);
353355
call_asm(
354356
fx,
355-
"llvm__aarch64__neon__smaxp__v8i8",
356-
&[a, b],
357+
"llvm.aarch64.neon.smaxp.v8i8",
358+
args,
357359
ret,
358360
&[0, 0, 64, 253, 33, 0, 64, 253, 0, 164, 33, 14, 64, 0, 0, 253, 192, 3, 95, 214],
359361
);
360362
}
361363
"llvm.aarch64.neon.smaxv.i16.v4i16" => {
362-
intrinsic_args!(fx, args => (a); intrinsic);
364+
assert_eq!(args.len(), 1);
363365
call_asm(
364366
fx,
365-
"llvm__aarch64__neon__smaxv__i16__v4i16",
366-
&[a],
367+
"llvm.aarch64.neon.smaxv.i16.v4i16",
368+
args,
367369
ret,
368370
&[0, 0, 64, 253, 0, 168, 112, 14, 32, 0, 0, 125, 192, 3, 95, 214],
369371
);
370372
}
371373
"llvm.aarch64.neon.smaxv.i16.v8i16" => {
372-
intrinsic_args!(fx, args => (a); intrinsic);
374+
assert_eq!(args.len(), 1);
373375
call_asm(
374376
fx,
375-
"llvm__aarch64__neon__smaxv__i16__v8i16",
376-
&[a],
377+
"llvm.aarch64.neon.smaxv.i16.v8i16",
378+
args,
377379
ret,
378380
&[0, 0, 192, 61, 0, 168, 112, 78, 32, 0, 0, 125, 192, 3, 95, 214],
379381
);
380382
}
381383
"llvm.aarch64.neon.smaxv.i32.v2i32" => {
382-
intrinsic_args!(fx, args => (a); intrinsic);
384+
assert_eq!(args.len(), 1);
383385
call_asm(
384386
fx,
385-
"llvm__aarch64__neon__smaxv__i32__v2i32",
386-
&[a],
387+
"llvm.aarch64.neon.smaxv.i32.v2i32",
388+
args,
387389
ret,
388390
&[0, 0, 64, 253, 0, 164, 160, 14, 32, 0, 0, 189, 192, 3, 95, 214],
389391
);
390392
}
391393
"llvm.aarch64.neon.smaxv.i32.v4i32" => {
392-
intrinsic_args!(fx, args => (a); intrinsic);
394+
assert_eq!(args.len(), 1);
393395
call_asm(
394396
fx,
395-
"llvm__aarch64__neon__smaxv__i32__v4i32",
396-
&[a],
397+
"llvm.aarch64.neon.smaxv.i32.v4i32",
398+
args,
397399
ret,
398400
&[0, 0, 192, 61, 0, 168, 176, 78, 32, 0, 0, 189, 192, 3, 95, 214],
399401
);
400402
}
401403
"llvm.aarch64.neon.smaxv.i8.v16i8" => {
402-
intrinsic_args!(fx, args => (a); intrinsic);
404+
assert_eq!(args.len(), 1);
403405
call_asm(
404406
fx,
405-
"llvm__aarch64__neon__smaxv__i8__v16i8",
406-
&[a],
407+
"llvm.aarch64.neon.smaxv.i8.v16i8",
408+
args,
407409
ret,
408410
&[0, 0, 192, 61, 0, 168, 48, 78, 32, 0, 0, 13, 192, 3, 95, 214],
409411
);
410412
}
411413
"llvm.aarch64.neon.smaxv.i8.v8i8" => {
412-
intrinsic_args!(fx, args => (a); intrinsic);
414+
assert_eq!(args.len(), 1);
413415
call_asm(
414416
fx,
415-
"llvm__aarch64__neon__smaxv__i8__v8i8",
416-
&[a],
417+
"llvm.aarch64.neon.smaxv.i8.v8i8",
418+
args,
417419
ret,
418420
&[0, 0, 64, 253, 0, 168, 48, 14, 32, 0, 0, 13, 192, 3, 95, 214],
419421
);
@@ -670,45 +672,46 @@ pub(crate) fn codegen_aarch64_llvm_intrinsic_call<'tcx>(
670672

671673
// ==== begin autogenerated section ====
672674
"llvm.trunc.v1f64" => {
673-
intrinsic_args!(fx, args => (a); intrinsic);
675+
assert_eq!(args.len(), 1);
674676
call_asm(
675677
fx,
676-
"llvm__trunc__v1f64",
677-
&[a],
678+
"llvm.trunc.v1f64",
679+
args,
678680
ret,
679681
&[0, 0, 64, 253, 0, 192, 101, 30, 32, 0, 0, 253, 192, 3, 95, 214],
680682
);
681683
}
682684
"llvm.trunc.v2f32" => {
683-
intrinsic_args!(fx, args => (a); intrinsic);
685+
assert_eq!(args.len(), 1);
684686
call_asm(
685687
fx,
686-
"llvm__trunc__v2f32",
687-
&[a],
688+
"llvm.trunc.v2f32",
689+
args,
688690
ret,
689691
&[0, 0, 64, 253, 0, 152, 161, 14, 32, 0, 0, 253, 192, 3, 95, 214],
690692
);
691693
}
692694
"llvm.trunc.v2f64" => {
693-
intrinsic_args!(fx, args => (a); intrinsic);
695+
assert_eq!(args.len(), 1);
694696
call_asm(
695697
fx,
696-
"llvm__trunc__v2f64",
697-
&[a],
698+
"llvm.trunc.v2f64",
699+
args,
698700
ret,
699701
&[0, 0, 192, 61, 0, 152, 225, 78, 32, 0, 128, 61, 192, 3, 95, 214],
700702
);
701703
}
702704
"llvm.trunc.v4f32" => {
703-
intrinsic_args!(fx, args => (a); intrinsic);
705+
assert_eq!(args.len(), 1);
704706
call_asm(
705707
fx,
706-
"llvm__trunc__v4f32",
707-
&[a],
708+
"llvm.trunc.v4f32",
709+
args,
708710
ret,
709711
&[0, 0, 192, 61, 0, 152, 161, 78, 32, 0, 128, 61, 192, 3, 95, 214],
710712
);
711713
}
714+
712715
// ==== end autogenerated section
713716

714717
/*

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