chore: Appease clippy

.cargo/config → .cargo/config.toml

@@ -1,3 +1,2 @@
 [target.aarch64-unknown-linux-musl]
 rustflags = [ "-C", "target-feature=+crt-static", "-C", "link-arg=-lgcc" ]
-

src/aml.rs

@@ -262,7 +262,7 @@ pub struct Package<'a> {
     children: Vec<&'a dyn Aml>,
 }
 
-impl<'a> Aml for Package<'a> {
+impl Aml for Package<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = vec![self.children.len() as u8];
         for child in &self.children {
@@ -337,7 +337,7 @@ pub struct VarPackageTerm<'a> {
     data: &'a dyn Aml,
 }
 
-impl<'a> Aml for VarPackageTerm<'a> {
+impl Aml for VarPackageTerm<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
         self.data.to_aml_bytes(&mut bytes);
@@ -426,12 +426,12 @@ impl EISAName {
 
         let data = name.as_bytes();
 
-        let value: u32 = (u32::from(data[0].checked_sub(NAMECHARBASE).unwrap()) << 26
-            | u32::from(data[1].checked_sub(NAMECHARBASE).unwrap()) << 21
-            | u32::from(data[2].checked_sub(NAMECHARBASE).unwrap()) << 16
-            | name.chars().nth(3).unwrap().to_digit(16).unwrap() << 12
-            | name.chars().nth(4).unwrap().to_digit(16).unwrap() << 8
-            | name.chars().nth(5).unwrap().to_digit(16).unwrap() << 4
+        let value: u32 = ((u32::from(data[0].checked_sub(NAMECHARBASE).unwrap()) << 26)
+            | (u32::from(data[1].checked_sub(NAMECHARBASE).unwrap()) << 21)
+            | (u32::from(data[2].checked_sub(NAMECHARBASE).unwrap()) << 16)
+            | (name.chars().nth(3).unwrap().to_digit(16).unwrap() << 12)
+            | (name.chars().nth(4).unwrap().to_digit(16).unwrap() << 8)
+            | (name.chars().nth(5).unwrap().to_digit(16).unwrap() << 4)
             | name.chars().nth(6).unwrap().to_digit(16).unwrap())
         .swap_bytes();
 
@@ -487,7 +487,7 @@ pub struct ResourceTemplate<'a> {
     children: Vec<&'a dyn Aml>,
 }
 
-impl<'a> Aml for ResourceTemplate<'a> {
+impl Aml for ResourceTemplate<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
 
@@ -596,7 +596,7 @@ impl<T: Default> AddressSpace<T> {
             type_: AddressSpaceType::Memory,
             min,
             max,
-            type_flags: (cacheable as u8) << 1 | read_write as u8,
+            type_flags: ((cacheable as u8) << 1) | read_write as u8,
             translation,
         }
     }
@@ -629,7 +629,7 @@ impl<T: Default> AddressSpace<T> {
             sink.byte(byte);
         }
         sink.byte(self.type_ as u8); /* type */
-        let generic_flags = 1 << 2 /* Min Fixed */ | 1 << 3; /* Max Fixed */
+        let generic_flags = (1 << 2) /* Min Fixed */ | (1 << 3); /* Max Fixed */
         sink.byte(generic_flags);
         sink.byte(self.type_flags);
     }
@@ -749,9 +749,9 @@ impl Aml for Interrupt {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         sink.byte(EXTIRQDESC); /* Extended IRQ Descriptor */
         sink.word(6);
-        let flags = (self.shared as u8) << 3
-            | (self.active_low as u8) << 2
-            | (self.edge_triggered as u8) << 1
+        let flags = ((self.shared as u8) << 3)
+            | ((self.active_low as u8) << 2)
+            | ((self.edge_triggered as u8) << 1)
             | self.consumer as u8;
         sink.byte(flags);
         sink.byte(1); /* count */
@@ -784,7 +784,7 @@ pub struct Device<'a> {
     children: Vec<&'a dyn Aml>,
 }
 
-impl<'a> Aml for Device<'a> {
+impl Aml for Device<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
         self.path.to_aml_bytes(&mut bytes);
@@ -814,7 +814,7 @@ pub struct Scope<'a> {
     children: Vec<&'a dyn Aml>,
 }
 
-impl<'a> Aml for Scope<'a> {
+impl Aml for Scope<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
         self.path.to_aml_bytes(&mut bytes);
@@ -876,11 +876,11 @@ impl<'a> Method<'a> {
     }
 }
 
-impl<'a> Aml for Method<'a> {
+impl Aml for Method<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
         self.path.to_aml_bytes(&mut bytes);
-        let flags: u8 = (self.args & 0x7) | (self.serialized as u8) << 3;
+        let flags: u8 = (self.args & 0x7) | ((self.serialized as u8) << 3);
         bytes.push(flags);
         for child in &self.children {
             child.to_aml_bytes(&mut bytes);
@@ -961,8 +961,9 @@ impl Aml for Field {
         let mut bytes = Vec::new();
         self.path.to_aml_bytes(&mut bytes);
 
-        let flags: u8 =
-            self.access_type as u8 | (self.lock_rule as u8) << 4 | (self.update_rule as u8) << 5;
+        let flags: u8 = self.access_type as u8
+            | ((self.lock_rule as u8) << 4)
+            | ((self.update_rule as u8) << 5);
         bytes.push(flags);
 
         for field in self.fields.iter() {
@@ -1022,7 +1023,7 @@ impl<'a> OpRegion<'a> {
     }
 }
 
-impl<'a> Aml for OpRegion<'a> {
+impl Aml for OpRegion<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         sink.byte(EXTOPPREFIX);
         sink.byte(OPREGIONOP);
@@ -1049,7 +1050,7 @@ impl<'a> If<'a> {
     }
 }
 
-impl<'a> Aml for If<'a> {
+impl Aml for If<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
         self.predicate.to_aml_bytes(&mut bytes);
@@ -1077,7 +1078,7 @@ impl<'a> Else<'a> {
     }
 }
 
-impl<'a> Aml for Else<'a> {
+impl Aml for Else<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
         for child in self.body.iter() {
@@ -1165,7 +1166,7 @@ impl<'a> Store<'a> {
     }
 }
 
-impl<'a> Aml for Store<'a> {
+impl Aml for Store<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         sink.byte(STOREOP);
         self.value.to_aml_bytes(sink);
@@ -1250,7 +1251,7 @@ impl<'a> Notify<'a> {
     }
 }
 
-impl<'a> Aml for Notify<'a> {
+impl Aml for Notify<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         sink.byte(NOTIFYOP);
         self.object.to_aml_bytes(sink);
@@ -1275,7 +1276,7 @@ impl<'a> While<'a> {
     }
 }
 
-impl<'a> Aml for While<'a> {
+impl Aml for While<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
         self.predicate.to_aml_bytes(&mut bytes);
@@ -1416,7 +1417,7 @@ impl<'a> CreateField<'a> {
     }
 }
 
-impl<'a> Aml for CreateField<'a> {
+impl Aml for CreateField<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         sink.byte(EXTOPPREFIX);
         sink.byte(CREATEFIELDOP);
@@ -1451,7 +1452,7 @@ impl<'a> Mid<'a> {
     }
 }
 
-impl<'a> Aml for Mid<'a> {
+impl Aml for Mid<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         sink.byte(MIDOP);
         self.source.to_aml_bytes(sink);
@@ -1474,7 +1475,7 @@ impl<'a> MethodCall<'a> {
     }
 }
 
-impl<'a> Aml for MethodCall<'a> {
+impl Aml for MethodCall<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         self.name.to_aml_bytes(sink);
         for arg in self.args.iter() {
@@ -1495,7 +1496,7 @@ impl<'a> BufferTerm<'a> {
     }
 }
 
-impl<'a> Aml for BufferTerm<'a> {
+impl Aml for BufferTerm<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
         self.data.to_aml_bytes(&mut bytes);
@@ -1629,7 +1630,7 @@ impl<'a> PowerResource<'a> {
     }
 }
 
-impl<'a> Aml for PowerResource<'a> {
+impl Aml for PowerResource<'_> {
     fn to_aml_bytes(&self, sink: &mut dyn AmlSink) {
         let mut bytes = Vec::new();
 
@@ -1948,12 +1949,12 @@ mod tests {
         assert_eq!(create_pkg_length(62, true), vec![63]);
         assert_eq!(
             create_pkg_length(64, true),
-            vec![1 << 6 | (66 & 0xf), 66 >> 4]
+            vec![(1 << 6) | (66 & 0xf), 66 >> 4]
         );
         assert_eq!(
             create_pkg_length(4096, true),
             vec![
-                2 << 6 | (4099 & 0xf) as u8,
+                (2 << 6) | (4099 & 0xf) as u8,
                 (4099 >> 4) as u8,
                 (4099 >> 12) as u8
             ]

src/bert.rs

@@ -16,7 +16,6 @@ type U64 = byteorder::U64<LE>;
 /// firmware-reserved memory that is used to store details of any
 /// unhandled errors that occurred in the previous boot. The format of
 /// the Boot Error Region follows that of an `Error Status Block`.
-
 #[repr(C, packed)]
 #[derive(Clone, Copy, Debug, Default, AsBytes)]
 pub struct BERT {

src/cedt.rs

@@ -401,7 +401,7 @@ impl PortAssociation {
     }
 
     fn bdf(&self) -> u16 {
-        (self.bus as u16) << 8 | (self.device as u16) << 3 | self.function as u16
+        ((self.bus as u16) << 8) | ((self.device as u16) << 3) | self.function as u16
     }
 }
 

src/gas.rs

@@ -78,7 +78,8 @@ impl GAS {
         function: u8,
         register: u16,
     ) -> Self {
-        let address = ((device as u64) << 32 | (function as u64) << 16 | (register as u64)).into();
+        let address =
+            (((device as u64) << 32) | ((function as u64) << 16) | (register as u64)).into();
         Self {
             address_space_id: AddressSpace::PciConfigSpace,
             register_bit_width,

src/hmat.rs

@@ -316,10 +316,10 @@ impl MemorySideCache {
         cacheline_size: u16,
     ) -> Self {
         let attributes = total_cache_levels as u32
-            | (this_cache_level as u32) << 4
-            | (associativity as u32) << 8
-            | (write_policy as u32) << 12
-            | (cacheline_size as u32) << 16;
+            | ((this_cache_level as u32) << 4)
+            | ((associativity as u32) << 8)
+            | ((write_policy as u32) << 12)
+            | ((cacheline_size as u32) << 16);
         Self {
             proximity_domain,
             cache_size,

src/rimt.rs

@@ -139,7 +139,7 @@ impl PciDevice {
     }
 
     fn as_bdf(&self) -> u16 {
-        (self.bus as u16) << 8 | (self.device as u16) << 3 | self.function as u16
+        ((self.bus as u16) << 8) | ((self.device as u16) << 3) | self.function as u16
     }
 
     fn as_segment(&self) -> u16 {
@@ -445,7 +445,7 @@ impl Platform {
     }
 
     fn id_mapping_offset(&self) -> usize {
-        Self::NAME_OFFSET + self.name.as_bytes().len() + 1
+        Self::NAME_OFFSET + self.name.len() + 1
     }
 
     fn len(&self) -> usize {

src/sdt.rs

@@ -9,7 +9,7 @@ use crate::{Aml, AmlSink};
 use alloc::vec::Vec;
 use zerocopy::AsBytes;
 
-#[repr(packed)]
+#[repr(C, packed)]
 #[derive(Clone, Copy, AsBytes)]
 pub struct GenericAddress {
     pub address_space_id: u8,

src/srat.rs

@@ -196,7 +196,7 @@ impl Handle {
     }
 
     fn devfn(device: u8, function: u8) -> u8 {
-        device << 3 | function
+        (device << 3) | function
     }
 }
 

src/viot.rs

@@ -146,7 +146,7 @@ impl PciDevice {
     }
 
     fn as_bdf(&self) -> u16 {
-        (self.bus as u16) << 8 | (self.device as u16) << 3 | self.function as u16
+        ((self.bus as u16) << 8) | ((self.device as u16) << 3) | self.function as u16
     }
 }