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Machine Opcodes

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Boris Resnick edited this page Jul 15, 2018 · 12 revisions

Machine code and assembly operation codes

General-purpose registers (GPR) are a to h.

Most of the commands take GPRs as operands, few take constants or no arguments at all.

Mnemonics:

  • Rx - GPR-type operand number 'x' (starting from 1)
  • M[x] - memory at address 'x'
  • Ux - unsigned constant number 'x'
  • Sx - signed constant number 'x'
  • L[n] - peripheral on line 'n'
  • IP - instruction pointer register
  • SP - stack pointer register

Everything is 32-bit.

Syntax given below is translated by SASM assembler into loadable binary.

Basic

hlt - Halt

Syntax: hlt

Operation: Stops Emulation

Opcode is 0x00, it makes it easier to detect bugs

nop - No Operation

Syntax: nop

Operation: Does nothing

After execution, emulation thread sleeps for 0.1 seconds

jmp - Unconditional Jump

Syntax: jmp R1

Operation: IP -> R1

ldc - Load Constant

Syntax: ldc U1 R2

Operation: U1 -> R2

mrm - Write Register to Memory

Syntax: mrm R1 R2

Operation: R1 -> M[R2]

mmr - Read from memory to register

Syntax: mmr R1 R2

Operation: M[R1] -> R2

out - Signal to Peripheral

Syntax: out R1

Operation: signal -> L[R1]

Sends signal to peripheral in given line

jgt - Conditional Jump

Syntax: jgt R1 R2

Operation: if R1 .gt 0 jmp R2

opn - Open

Syntax: opn

Operation: enable interrupts

When interrupts are enabled, signal from a peripheral lead to call of corresponding interrupt handler.

cls

Syntax: cls

Operation: close interrupts

ldr - Load Relative

Syntax: ldr S1 R2

Operation: IP + S1 -> R2

Reads from memory from address calculated from instruction pointer and given signed constant.

lsp - Load Stack Pointer

Syntax: lsp R1

Operation: R1 -> SP

psh - Push to Stack

Syntax: push R1

Operation: R1 -> [SP++]

Stack grows from lower address to higher.

pop - Fetch from Stack

Syntax: pop R1

Operation: [SP--] -> R1

int - Loopback Interrupt

Syntax: int

Operation: INT L[0]

Causes virtual loopback device (located on line 0) to trigger an interrupt signal.

cll

Syntax: cll

Operation: PSH IP + 4; JMP R1

ret

Syntax: ret

Operation: JMP [SP--]

irx

Syntax: irx

Operation: POP h-a; ret; opn

ssp

Syntax: ssp

Operation: SP -> R1

mrr

Syntax: mrr

Operation: R1 -> R2

Arithmetic

inv

Syntax: inv

Operation: ~R1 -> R2

add

Syntax: add

Operation: R1 + R2 -> R3

sub

Syntax: sub

Operation: R1 - R2 -> R3

mul

Syntax: mul

Operation: R1 * R2 -> R3

div

Syntax: div

Operation: R1 // R2 -> R3

mod

Syntax: mod

Operation: R1 % R2 -> R3

rsh

Syntax: rsh

Operation: R1 >> R2 -> R3

lsh

Syntax: lsh

Operation: R1 << R2 -> R3

bor

Syntax: bor

Operation: R1 | R2 -> R3

xor

Syntax: xor

Operation: R1 ^ R2 -> R3

band

Syntax: band

Operation: R1 & R2 -> R3

Emulated

bpt

Syntax: bpt

Operation: U1 -> external breakpoint

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