Nano Hamming

Nano Hamming is a minimal FPGA accelerator kernel for hyperdimensional computing (HDC) inference.
It computes the Hamming distance between two 64-bit hypervector words using associative XOR binding and population count logic implemented as deterministic, single-cycle combinational hardware.

This module is designed as a hardware offload primitive for NanoHD, but can be generalized for any ultra-low-latency binary HDC inference tasks.

---

Design Overview

In hyperdimensional computing, inference often involves computing Hamming distances between hypervectors. Nano Hamming accelerates this operation in hardware by:

• Performing bitwise XOR binding between two 64-bit hypervectors
• Accumulating the resulting bit differences via combinational population count logic
• Producing a deterministic Hamming distance output in a single cycle

The design is fully combinational, contains no state, and is suitable for integration into larger HW/SW co-designed systems.

---

Module Interface

module nano_hamming(
    input  [63:0] test_hv_1,
    input  [63:0] class_hv_1,
    output [6:0]  ham_dist   // 0–64 Hamming distance
);

Verification

A minimal self-checking testbench is provided to verify correctness under common cases, including:

- Identical hypervectors (Hamming distance = 0)
- Fully orthogonal hypervectors (Hamming distance = 64)

The testbench asserts correctness and prints a success message upon completion.

Repository Structure

nano_hamming/
├── rtl/
│   └── nano_hamming.v
├── tb/
│   └── nano_hamming_tb.v
└── README.md

Usage

This module can be integrated into:

- FPGA-based inference pipelines
- Embedded systems with HW/SW co-design
- Hyperdimensional computing accelerators
- Low-latency signal processing applications

It is intended as a building block for larger designs and does not include control logic or bus interfaces.