@@ -115,10 +115,10 @@ define <4 x double> @constrained_vector_fdiv_v4f64() #0 {
115115; CHECK-LABEL: constrained_vector_fdiv_v4f64:
116116; CHECK: # %bb.0: # %entry
117117; CHECK-NEXT: movapd {{.*#+}} xmm2 = [1.0E+1,1.0E+1]
118- ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [3.0E+0,4.0E+0]
119- ; CHECK-NEXT: divpd %xmm2, %xmm1
120118; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
121119; CHECK-NEXT: divpd %xmm2, %xmm0
120+ ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [3.0E+0,4.0E+0]
121+ ; CHECK-NEXT: divpd %xmm2, %xmm1
122122; CHECK-NEXT: retq
123123;
124124; AVX1-LABEL: constrained_vector_fdiv_v4f64:
@@ -507,10 +507,10 @@ entry:
507507define <4 x double > @constrained_vector_fmul_v4f64 () #0 {
508508; CHECK-LABEL: constrained_vector_fmul_v4f64:
509509; CHECK: # %bb.0: # %entry
510- ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
511- ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [4 .0E+0,5 .0E+0]
512- ; CHECK-NEXT: mulpd %xmm0 , %xmm1
513- ; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0
510+ ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308]
511+ ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [2 .0E+0,3 .0E+0]
512+ ; CHECK-NEXT: mulpd %xmm1 , %xmm0
513+ ; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm1
514514; CHECK-NEXT: retq
515515;
516516; AVX1-LABEL: constrained_vector_fmul_v4f64:
@@ -644,10 +644,10 @@ entry:
644644define <4 x double > @constrained_vector_fadd_v4f64 () #0 {
645645; CHECK-LABEL: constrained_vector_fadd_v4f64:
646646; CHECK: # %bb.0: # %entry
647- ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
648- ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [2 .0E+0,2 .0000000000000001E-1]
649- ; CHECK-NEXT: addpd %xmm0 , %xmm1
650- ; CHECK-NEXT: addpd {{.*}}(%rip), %xmm0
647+ ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308]
648+ ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1 .0E+0,1 .0000000000000001E-1]
649+ ; CHECK-NEXT: addpd %xmm1 , %xmm0
650+ ; CHECK-NEXT: addpd {{.*}}(%rip), %xmm1
651651; CHECK-NEXT: retq
652652;
653653; AVX1-LABEL: constrained_vector_fadd_v4f64:
@@ -784,10 +784,10 @@ entry:
784784define <4 x double > @constrained_vector_fsub_v4f64 () #0 {
785785; CHECK-LABEL: constrained_vector_fsub_v4f64:
786786; CHECK: # %bb.0: # %entry
787- ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [-1.7976931348623157E+308,-1.7976931348623157E+308]
788- ; CHECK-NEXT: movapd %xmm0, %xmm1
789- ; CHECK-NEXT: subpd {{.*}}(%rip), %xmm1
787+ ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [-1.7976931348623157E+308,-1.7976931348623157E+308]
788+ ; CHECK-NEXT: movapd %xmm1, %xmm0
790789; CHECK-NEXT: subpd {{.*}}(%rip), %xmm0
790+ ; CHECK-NEXT: subpd {{.*}}(%rip), %xmm1
791791; CHECK-NEXT: retq
792792;
793793; AVX1-LABEL: constrained_vector_fsub_v4f64:
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