@@ -397,7 +397,9 @@ TIM_HandleTypeDef* stm32_alignTimers(TIM_HandleTypeDef *timers_in[], uint8_t num
397397
398398
399399 #ifdef SIMPLEFOC_STM32_DEBUG
400- SIMPLEFOC_DEBUG (" STM32-DRV: Syncronising timers! Timer no. " , numTimers);
400+ SimpleFOCDebug::print (" STM32-DRV: Synchronising " );
401+ SimpleFOCDebug::print (numTimers);
402+ SimpleFOCDebug::println (" timers" );
401403 #endif
402404
403405 // see if there is more then 1 timers used for the pwm
@@ -441,7 +443,7 @@ TIM_HandleTypeDef* stm32_alignTimers(TIM_HandleTypeDef *timers_in[], uint8_t num
441443 LL_TIM_SetSlaveMode (timers[master_index]->Instance , LL_TIM_SLAVEMODE_DISABLED );
442444 // Configure the master timer to send a trigger signal on enable
443445 LL_TIM_SetTriggerOutput (timers[master_index]->Instance , LL_TIM_TRGO_ENABLE);
444- LL_TIM_EnableMasterSlaveMode (timers[master_index]->Instance );
446+ // LL_TIM_EnableMasterSlaveMode(timers[master_index]->Instance);
445447
446448 // configure other timers to get the input trigger from the master timer
447449 for (int slave_index=0 ; slave_index < numTimers; slave_index++) {
@@ -451,15 +453,24 @@ TIM_HandleTypeDef* stm32_alignTimers(TIM_HandleTypeDef *timers_in[], uint8_t num
451453 SIMPLEFOC_DEBUG (" STM32-DRV: slave timer: TIM" , stm32_getTimerNumber (timers[slave_index]->Instance ));
452454 #endif
453455 // Configure the slave timer to be triggered by the master enable signal
454- LL_TIM_SetTriggerInput (timers[slave_index]->Instance , stm32_getInternalSourceTrigger (timers[master_index], timers[slave_index]));
455- #if defined(STM32G4xx)
456- LL_TIM_SetSlaveMode (timers[slave_index]->Instance , LL_TIM_SLAVEMODE_COMBINED_GATEDRESET);
457- #else
456+ uint32_t trigger = stm32_getInternalSourceTrigger (timers[master_index], timers[slave_index]);
457+ // #ifdef SIMPLEFOC_STM32_DEBUG
458+ // SIMPLEFOC_DEBUG("STM32-DRV: slave trigger ITR ", (int)trigger);
459+ // #endif
460+ LL_TIM_SetTriggerInput (timers[slave_index]->Instance , trigger);
461+ // #if defined(STM32G4xx)
462+ // LL_TIM_SetSlaveMode(timers[slave_index]->Instance, LL_TIM_SLAVEMODE_COMBINED_GATEDRESET);
463+ // #else
458464 LL_TIM_SetSlaveMode (timers[slave_index]->Instance , LL_TIM_SLAVEMODE_GATED);
459- #endif
465+ // #endif
466+ }
467+ for (int i=0 ; i<numTimers; i++) { // resume the timers TODO at the moment the first PWM cycle is not well-aligned
468+ stm32_refreshTimer (timers[i]);
469+ if (i != master_index)
470+ stm32_resumeTimer (timers[i]);
471+ SIMPLEFOC_DEBUG (" STM32-DRV: slave counter: " , (int )timers[i]->Instance ->CNT );
460472 }
461- for (int i=0 ; i<numTimers; i++) // resume the timers TODO at the moment the first PWM cycle is not well-aligned
462- stm32_resumeTimer (timers[i]);
473+ stm32_resumeTimer (timers[master_index]);
463474 return timers[master_index];
464475 }
465476 }
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