@@ -204,30 +204,105 @@ void _stopTimers(HardwareTimer **timers_to_stop, int timer_num)
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}
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- // function finds the appropriate timer source trigger for the master timer index provided
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+ #if defined(STM32G4xx)
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+ // function finds the appropriate timer source trigger for the master/slave timer combination
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// returns -1 if no trigger source is found
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// currently supports the master timers to be from TIM1 to TIM4 and TIM8
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- int _getTriggerSourceRegister (HardwareTimer* timer) {
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+ int _getInternalSourceTrigger (HardwareTimer* master, HardwareTimer* slave) { // put master and slave in temp variables to avoid arrows
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+ TIM_TypeDef *TIM_master = master->getHandle ()->Instance ;
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#if defined(TIM1) && defined(LL_TIM_TS_ITR0)
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- if (timer-> getHandle ()-> Instance == TIM1) return LL_TIM_TS_ITR0;// return TIM_TS_ITR0;
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+ if (TIM_master == TIM1) return LL_TIM_TS_ITR0;// return TIM_TS_ITR0;
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#endif
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#if defined(TIM2) && defined(LL_TIM_TS_ITR1)
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- if (timer-> getHandle ()-> Instance == TIM2) return LL_TIM_TS_ITR1;// return TIM_TS_ITR1;
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+ else if (TIM_master == TIM2) return LL_TIM_TS_ITR1;// return TIM_TS_ITR1;
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#endif
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#if defined(TIM3) && defined(LL_TIM_TS_ITR2)
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- if (timer-> getHandle ()-> Instance == TIM3) return LL_TIM_TS_ITR2;// return TIM_TS_ITR2;
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+ else if (TIM_master == TIM3) return LL_TIM_TS_ITR2;// return TIM_TS_ITR2;
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#endif
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#if defined(TIM4) && defined(LL_TIM_TS_ITR3)
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- if (timer-> getHandle ()-> Instance == TIM4) return LL_TIM_TS_ITR3;// return TIM_TS_ITR3;
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+ else if (TIM_master == TIM4) return LL_TIM_TS_ITR3;// return TIM_TS_ITR3;
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#endif
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#if defined(TIM5) && defined(LL_TIM_TS_ITR4)
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- if (timer-> getHandle ()-> Instance == TIM5) return LL_TIM_TS_ITR4;// return TIM_TS_ITR4;
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+ else if (TIM_master == TIM5) return LL_TIM_TS_ITR4;// return TIM_TS_ITR4;
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#endif
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#if defined(TIM8) && defined(LL_TIM_TS_ITR5)
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- if (timer-> getHandle ()-> Instance == TIM8) return LL_TIM_TS_ITR5;// return TIM_TS_ITR5;
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+ else if (TIM_master == TIM8) return LL_TIM_TS_ITR5;// return TIM_TS_ITR5;
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#endif
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return -1 ;
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}
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+ #elif defined(STM32F4xx) || defined(STM32F1xx) || defined(STM32L4xx)
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+
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+ // function finds the appropriate timer source trigger for the master/slave timer combination
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+ // returns -1 if no trigger source is found
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+ // currently supports the master timers to be from TIM1 to TIM4 and TIM8
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+ int _getTriggerSourceRegister (HardwareTimer* master, HardwareTimer* slave) {
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+ // put master and slave in temp variables to avoid arrows
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+ TIM_TypeDef *TIM_master = master->getHandle ()->Instance ;
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+ TIM_TypeDef *TIM_slave = slave->getHandle ()->Instance ;
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+ #if defined(TIM1) && defined(LL_TIM_TS_ITR0)
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+ if (TIM_master == TIM1){
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+ if (TIM_slave == TIM2 || TIM_slave == TIM3 || TIM_slave == TIM4) return LL_TIM_TS_ITR0;
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+ #if defined(TIM8)
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+ else if (TIM_slave == TIM8) return LL_TIM_TS_ITR0;
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+ #endif
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+ }
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+ #endif
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+ #if defined(TIM2) && defined(LL_TIM_TS_ITR1)
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+ else if (TIM_master == TIM2){
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+ if (TIM_slave == TIM1 || TIM_slave == TIM3 || TIM_slave == TIM4) return LL_TIM_TS_ITR1;
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+ #if defined(TIM8)
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+ else if (TIM_slave == TIM8) return LL_TIM_TS_ITR1;
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+ #endif
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+ #if defined(TIM5)
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+ else if (TIM_slave == TIM5) return LL_TIM_TS_ITR0;
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+ #endif
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+ }
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+ #endif
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+ #if defined(TIM3) && defined(LL_TIM_TS_ITR2)
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+ else if (TIM_master == TIM3){
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+ if (TIM_slave== TIM1 || TIM_slave == TIM2 || TIM_slave == TIM4) return LL_TIM_TS_ITR2;
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+ #if defined(TIM5)
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+ else if (TIM_slave == TIM5) return LL_TIM_TS_ITR1;
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+ #endif
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+ }
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+ #endif
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+ #if defined(TIM4) && defined(LL_TIM_TS_ITR3)
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+ else if (TIM_master == TIM4){
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+ if (TIM_slave == TIM1 || TIM_slave == TIM2 || TIM_slave == TIM3) return LL_TIM_TS_ITR3;
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+ #if defined(TIM8)
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+ else if (TIM_slave == TIM8) return LL_TIM_TS_ITR2;
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+ #endif
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+ #if defined(TIM5)
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+ else if (TIM_slave == TIM5) return LL_TIM_TS_ITR1;
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+ #endif
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+ }
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+ #endif
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+ #if defined(TIM5)
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+ else if (TIM_master == TIM5){
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+ #if !defined(STM32L4xx) // only difference between F4,F1 and L4
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+ if (TIM_slave == TIM1) return LL_TIM_TS_ITR0;
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+ else if (TIM_slave == TIM3) return LL_TIM_TS_ITR2;
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+ #endif
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+ #if defined(TIM8)
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+ if (TIM_slave == TIM8) return LL_TIM_TS_ITR3;
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+ #endif
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+ }
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+ #endif
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+ #if defined(TIM8)
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+ else if (TIM_master == TIM8){
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+ if (TIM_slave==TIM2) return LL_TIM_TS_ITR1;
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+ else if (TIM_slave ==TIM4 || TIM_slave ==TIM5) return LL_TIM_TS_ITR3;
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+ }
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+ #endif
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+ return -1 ; // combination not supported
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+ }
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+ #else
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+ // Alignment not supported for this architecture
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+ int _getTriggerSourceRegister (HardwareTimer* master, HardwareTimer* slave) {
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+ return -1 ;
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+ }
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+ #endif
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+
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void _alignTimersNew () {
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int numTimers = 0 ;
@@ -256,44 +331,50 @@ void _alignTimersNew() {
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// if yes, try to align timers
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if (numTimers > 1 ){
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// find the master timer
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- uint8_t masterTimerIndex = 0 ;
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+ int16_t master_index = - 1 ;
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int triggerEvent = -1 ;
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for (int i=0 ; i<numTimers; i++) {
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// check if timer can be master
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if (IS_TIM_MASTER_INSTANCE (timers[i]->getHandle ()->Instance )) {
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// check if timer already configured in TRGO update mode (used for ADC triggering)
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// in that case we should not change its TRGO configuration
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if (timers[i]->getHandle ()->Instance ->CR2 & LL_TIM_TRGO_UPDATE) continue ;
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- // check if it has the supported internal trigger
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- triggerEvent = _getTriggerSourceRegister (timers[i]);
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- if (triggerEvent == -1 ) continue ; // not supported keep searching
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- masterTimerIndex = i; // found the master timer
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+ // check if the timer has the supported internal trigger for other timers
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+ for (int slave_i=0 ; slave_i<numTimers; slave_i++) {
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+ if (i==slave_i) continue ; // skip self
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+ // check if it has the supported internal trigger
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+ triggerEvent = _getTriggerSourceRegister (timers[i],timers[slave_i]);
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+ if (triggerEvent == -1 ) break ; // not supported keep searching
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+ }
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+ if (triggerEvent == -1 ) continue ; // cannot be master, keep searching
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+ // otherwise the master has been found, remember the index
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+ master_index = i; // found the master timer
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break ;
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}
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}
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// if no master timer found do not perform alignment
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- if (triggerEvent == -1 ) {
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+ if (master_index == -1 ) {
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#ifdef SIMPLEFOC_STM32_DEBUG
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SIMPLEFOC_DEBUG (" STM32-DRV: ERR: No master timer found, cannot align timers!" );
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#endif
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}else {
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#ifdef SIMPLEFOC_STM32_DEBUG
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- SIMPLEFOC_DEBUG (" STM32-DRV: Aligning PWM to master timer: " , getTimerNumber (get_timer_index (timers[masterTimerIndex ]->getHandle ()->Instance )));
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+ SIMPLEFOC_DEBUG (" STM32-DRV: Aligning PWM to master timer: " , getTimerNumber (get_timer_index (timers[master_index ]->getHandle ()->Instance )));
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#endif
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// make the master timer generate ITRGx event
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// if it was already configured in slave mode
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- LL_TIM_SetSlaveMode (timers[masterTimerIndex ]->getHandle ()->Instance , LL_TIM_SLAVEMODE_DISABLED );
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+ LL_TIM_SetSlaveMode (timers[master_index ]->getHandle ()->Instance , LL_TIM_SLAVEMODE_DISABLED );
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// Configure the master timer to send a trigger signal on enable
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- LL_TIM_SetTriggerOutput (timers[masterTimerIndex ]->getHandle ()->Instance , LL_TIM_TRGO_ENABLE);
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+ LL_TIM_SetTriggerOutput (timers[master_index ]->getHandle ()->Instance , LL_TIM_TRGO_ENABLE);
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// configure other timers to get the input trigger from the master timer
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- for (int i =0 ; i< numTimers; i ++) {
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- if (i==masterTimerIndex )
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+ for (int slave_index =0 ; slave_index < numTimers; slave_index ++) {
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+ if (slave_index == master_index )
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continue ;
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// Configure the slave timer to be triggered by the master enable signal
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- LL_TIM_SetTriggerInput (timers[i ]->getHandle ()->Instance , triggerEvent );
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- LL_TIM_SetSlaveMode (timers[i ]->getHandle ()->Instance , LL_TIM_SLAVEMODE_TRIGGER);
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+ LL_TIM_SetTriggerInput (timers[slave_index ]->getHandle ()->Instance , _getTriggerSourceRegister (timers[master_index], timers[slave_index]) );
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+ LL_TIM_SetSlaveMode (timers[slave_index ]->getHandle ()->Instance , LL_TIM_SLAVEMODE_TRIGGER);
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}
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}
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}
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