Update home etching template DRC rules and dimensions

Author: sivakov512

templates/home-etch-photoresist/README.md

@@ -35,13 +35,13 @@ The template is preconfigured as a 2-layer board with constraints appropriate fo
 | Parameter                   | Value   | Notes                                    |
 | --------------------------- | ------- | ---------------------------------------- |
 | Minimum clearance           | 0.2 mm  | Safe for photoresist resolution          |
-| Minimum track width         | 0.25 mm | Reliable with standard UV exposure       |
+| Minimum track width         | 0.3 mm  | Reliable with standard UV exposure       |
 | Minimum connection width    | 0.25 mm | Ensures good electrical connection       |
-| Minimum annular width       | 0.15 mm | Adequate for manual drilling tolerance   |
-| Minimum via diameter        | 0.6 mm  | Suitable for 0.3 mm drill bits          |
+| Minimum annular width       | 0.25 mm | Adequate for manual drilling tolerance   |
+| Minimum via diameter        | 0.8 mm  | Suitable for 0.3 mm drill bits          |
 | Copper to hole clearance    | 0.3 mm  | Accounts for drilling precision          |
 | Copper to edge clearance    | 0.5 mm  | Safe margin for cutting/routing          |
-| Minimum through hole        | 0.6 mm  | Standard drill bit availability          |
+| Minimum through hole        | 0.3 mm  | Standard drill bit availability          |
 | Hole to hole clearance      | 0.3 mm  | Prevents drill breakage                  |
 | Min text height             | 0.8 mm  | Readable after etching process           |
 | Min text thickness          | 0.08 mm | Maintains legibility                     |
@@ -53,8 +53,8 @@ The template is preconfigured as a 2-layer board with constraints appropriate fo
 | Property       | Value   |
 | -------------- | ------- |
 | Clearance      | 0.2 mm  |
-| Track Width    | 0.25 mm |
-| Via Size       | 0.6 mm  |
+| Track Width    | 0.3 mm  |
+| Via Size       | 0.8 mm  |
 | Via Hole       | 0.3 mm  |
 | DiffPair Width | 0.2 mm  |
 | DiffPair Gap   | 0.25 mm |
@@ -73,7 +73,7 @@ The template is preconfigured as a 2-layer board with constraints appropriate fo
 
 ## Notes
 
-* No solder mask or silkscreen layers configured — add if needed for your process
+* No solder mask or silkscreen layers configured — silkscreen errors are ignored as this layer is not used in home etching
 * Conservative design rules prioritize manufacturing success over density
 * Test your specific photoresist/exposure setup with simple test patterns first
 * Consider tinning traces after etching to prevent oxidation

templates/home-etch-photoresist/home-etch-photoresist.kicad_pro

@@ -91,24 +91,24 @@
         "lib_footprint_mismatch": "warning",
         "malformed_courtyard": "error",
         "microvia_drill_out_of_range": "error",
-        "mirrored_text_on_front_layer": "warning",
+        "mirrored_text_on_front_layer": "ignore",
         "missing_courtyard": "ignore",
         "missing_footprint": "warning",
         "net_conflict": "warning",
-        "nonmirrored_text_on_back_layer": "warning",
+        "nonmirrored_text_on_back_layer": "ignore",
         "npth_inside_courtyard": "ignore",
         "padstack": "warning",
         "pth_inside_courtyard": "ignore",
         "shorting_items": "error",
-        "silk_edge_clearance": "warning",
-        "silk_over_copper": "warning",
-        "silk_overlap": "warning",
+        "silk_edge_clearance": "ignore",
+        "silk_over_copper": "ignore",
+        "silk_overlap": "ignore",
         "skew_out_of_range": "error",
         "solder_mask_bridge": "error",
         "starved_thermal": "error",
-        "text_height": "warning",
+        "text_height": "ignore",
         "text_on_edge_cuts": "error",
-        "text_thickness": "warning",
+        "text_thickness": "ignore",
         "through_hole_pad_without_hole": "error",
         "too_many_vias": "error",
         "track_angle": "error",
@@ -136,9 +136,9 @@
         "min_text_height": 0.8,
         "min_text_thickness": 0.08,
         "min_through_hole_diameter": 0.3,
-        "min_track_width": 0.25,
-        "min_via_annular_width": 0.15,
-        "min_via_diameter": 0.6,
+        "min_track_width": 0.3,
+        "min_via_annular_width": 0.25,
+        "min_via_diameter": 0.8,
         "solder_mask_to_copper_clearance": 0.0,
         "use_height_for_length_calcs": true
       },
@@ -481,8 +481,8 @@
         "pcb_color": "rgba(0, 0, 0, 0.000)",
         "priority": 2147483647,
         "schematic_color": "rgba(0, 0, 0, 0.000)",
-        "track_width": 0.25,
-        "via_diameter": 0.6,
+        "track_width": 0.3,
+        "via_diameter": 0.8,
         "via_drill": 0.3,
         "wire_width": 6
       }
@@ -492,7 +492,12 @@
     },
     "net_colors": null,
     "netclass_assignments": null,
-    "netclass_patterns": []
+    "netclass_patterns": [
+      {
+        "netclass": "Default",
+        "pattern": "*"
+      }
+    ]
   },
   "pcbnew": {
     "last_paths": {

templates/home-etch-photoresist/meta/info.html

@@ -94,7 +94,7 @@ <h2>Design Rules → Constraints</h2>
             </tr>
             <tr>
                 <td>Minimum track width</td>
-                <td>0.25 mm</td>
+                <td>0.3 mm</td>
                 <td>Reliable with standard UV exposure</td>
             </tr>
             <tr>
@@ -104,12 +104,12 @@ <h2>Design Rules → Constraints</h2>
             </tr>
             <tr>
                 <td>Minimum annular width</td>
-                <td>0.15 mm</td>
+                <td>0.25 mm</td>
                 <td>Adequate for manual drilling tolerance</td>
             </tr>
             <tr>
                 <td>Minimum via diameter</td>
-                <td>0.6 mm</td>
+                <td>0.8 mm</td>
                 <td>Suitable for 0.3 mm drill bits</td>
             </tr>
             <tr>
@@ -124,7 +124,7 @@ <h2>Design Rules → Constraints</h2>
             </tr>
             <tr>
                 <td>Minimum through hole</td>
-                <td>0.6 mm</td>
+                <td>0.3 mm</td>
                 <td>Standard drill bit availability</td>
             </tr>
             <tr>
@@ -156,11 +156,11 @@ <h2>Net Classes → <code>Default</code></h2>
             </tr>
             <tr>
                 <td>Track Width</td>
-                <td>0.25 mm</td>
+                <td>0.3 mm</td>
             </tr>
             <tr>
                 <td>Via Size</td>
-                <td>0.6 mm</td>
+                <td>0.8 mm</td>
             </tr>
             <tr>
                 <td>Via Hole</td>
@@ -203,8 +203,8 @@ <h2>Manufacturing Process Compatibility</h2>
         <h2>Notes</h2>
         <ul>
             <li>
-                No solder mask or silkscreen layers configured — add if needed
-                for your process
+                No solder mask or silkscreen layers configured — silkscreen
+                errors are ignored as this layer is not used in home etching
             </li>
             <li>
                 Conservative design rules prioritize manufacturing success over