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18 changes: 18 additions & 0 deletions boards/m5stack/m5stack_cores3/doc/index.rst
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,24 @@ M5Stack CoreS3/CoreS3 SE features consist of:
- Proximity sensor LTR-553ALS-WA (Not available for CoreS3 SE)
- 6-Axis IMU BMI270 (Not available for CoreS3 SE)

Display
=======

The integrated 2" SPI display is supported via the :dtcompatible:`ilitek,ili9342c`
driver. Applications can access the panel through the
:kconfig:option:`CONFIG_DISPLAY` API. For example, the following command builds
the :zephyr:code-sample:`lvgl` sample for the primary CPU:

.. zephyr-app-commands::
:zephyr-app: samples/subsys/display/lvgl
:board: m5stack_cores3/esp32s3/procpu
:goals: build
:compact:

The sample enables the LVGL GUI library by default. Once flashed, the graphical
output is rendered on the CoreS3 screen and touch input is provided by the
FT6336 controller.

Start Application Development
*****************************

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25 changes: 25 additions & 0 deletions boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_common.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@
#include "m5stack_cores3-pinctrl.dtsi"
#include "m5stack_mbus_connectors.dtsi"
#include "grove_connectors.dtsi"
#include <zephyr/dt-bindings/display/ili9xxx.h>

/ {
chosen {
Expand All @@ -20,6 +21,7 @@
zephyr,rtc = &bm8563_rtc;
zephyr,bt-hci = &esp32_bt_hci;
zephyr,touch = &ft6336_touch;
zephyr,display = &ili9342c;
};

aliases {
Expand All @@ -39,6 +41,29 @@
compatible = "zephyr,lvgl-pointer-input";
input = <&ft6336_touch>;
};

mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
dc-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
reset-gpios = <&aw9523b_gpio 1 GPIO_ACTIVE_LOW>;
spi-dev = <&spi2>;
write-only;
#address-cells = <1>;
#size-cells = <0>;

ili9342c: ili9342c@0 {
compatible = "ilitek,ili9342c";
reg = <0>;
mipi-max-frequency = <30000000>;
vin-supply = <&vcc_bl>;
pixel-format = <ILI9XXX_PIXEL_FORMAT_RGB565>;
color-order = "rgb";
display-inversion;
width = <320>;
height = <240>;
rotation = <0>;
};
};
};

&usb_serial {
Expand Down
15 changes: 9 additions & 6 deletions drivers/display/display_ili9xxx.c
Original file line number Diff line number Diff line change
Expand Up @@ -324,7 +324,8 @@
struct ili9xxx_data *data = dev->data;

int r;
uint8_t tx_data = ILI9XXX_MADCTL_BGR;
uint8_t tx_data = (config->color_order == ILI9XXX_COLOR_ORDER_BGR) ?

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ILI9XXX_MADCTL_BGR : 0U;

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if (config->quirks->cmd_set == CMD_SET_1) {
if (orientation == DISPLAY_ORIENTATION_NORMAL) {
tx_data |= ILI9XXX_MADCTL_MX;
Expand Down Expand Up @@ -549,11 +550,13 @@
.rotation = DT_PROP(INST_DT_ILI9XXX(n, t), rotation), \
.x_resolution = ILI##t##_X_RES, \
.y_resolution = ILI##t##_Y_RES, \
.inversion = DT_PROP(INST_DT_ILI9XXX(n, t), display_inversion),\
.te_mode = MIPI_DBI_TE_MODE_DT(INST_DT_ILI9XXX(n, t), te_mode),\
.regs = &ili##t##_regs_##n, \
.regs_init_fn = ili##t##_regs_init, \
}; \
.inversion = DT_PROP(INST_DT_ILI9XXX(n, t), display_inversion),\

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.te_mode = MIPI_DBI_TE_MODE_DT(INST_DT_ILI9XXX(n, t), te_mode),\

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.regs = &ili##t##_regs_##n, \

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.regs_init_fn = ili##t##_regs_init, \

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.color_order = \

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DT_ENUM_IDX(INST_DT_ILI9XXX(n, t), color_order), \

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}; \

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\
static struct ili9xxx_data ili9##t##_data_##n; \
\
Expand Down
6 changes: 6 additions & 0 deletions drivers/display/display_ili9xxx.h
Original file line number Diff line number Diff line change
Expand Up @@ -62,6 +62,11 @@ enum madctl_cmd_set {
CMD_SET_2, /* Used by ILI9342c */
};

enum ili9xxx_color_order {
ILI9XXX_COLOR_ORDER_RGB,
ILI9XXX_COLOR_ORDER_BGR,
};

struct ili9xxx_quirks {
enum madctl_cmd_set cmd_set;
};
Expand All @@ -78,6 +83,7 @@ struct ili9xxx_config {
uint8_t te_mode;
const void *regs;
int (*regs_init_fn)(const struct device *dev);
enum ili9xxx_color_order color_order;
};

int ili9xxx_transmit(const struct device *dev, uint8_t cmd,
Expand Down
12 changes: 12 additions & 0 deletions dts/bindings/display/ilitek,ili9xxx-common.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -42,3 +42,15 @@ properties:
description:
Display inversion mode. Every bit is inverted from the frame memory to
the display.

color-order:
type: string
enum:
- "rgb"
- "bgr"
default: "bgr"
description: |
Define the byte order used when updating display memory. Some panels
require RGB ordering while others expect BGR ordering. The default value
keeps backwards compatibility with existing boards that rely on the
BGR order.
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