Align CoreS3 DTS with 3-wire LCD configuration

[soburi]

Summary

• switch the CoreS3 MIPI-DBI node to the shared GPIO35 command/data line without write-only gating
• declare the ILI9342C panel in 3-wire SPI mode so the display stack expects half-duplex transfers

Testing

• not run (not requested)

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https://chatgpt.com/codex/tasks/task_e_68e20c3c30f08322a324e02063e61aab

[chatgpt-codex-connector]

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[chatgpt-codex-connector]

Add missing HAL logging/assert headers

The newly added SPI HAL sources include "hal/log.h" and "hal/assert.h", but those headers do not exist anywhere in the tree or in this commit. Because the files are compiled unconditionally, a normal build will fail with fatal error: hal/log.h: No such file or directory before any functionality can be used. Either provide the corresponding headers or replace these includes with existing Zephyr/IDF logging and assert helpers.

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