Fix CI and clocks' range

Author: thalesfragoso

.travis.yml

@@ -2,24 +2,24 @@ language: rust
 matrix:
   include:
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/stm32f407'
+      env: FEATURES='stm32f407'
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/stm32f417'
+      env: FEATURES='stm32f417'
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/stm32f427'
+      env: FEATURES='stm32f427'
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/stm32f429'
+      env: FEATURES='stm32f429'
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/stm32f437'
+      env: FEATURES='stm32f437'
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/stm32f439'
+      env: FEATURES='stm32f439'
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/stm32f469'
+      env: FEATURES='stm32f469'
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/stm32f479'
+      env: FEATURES='stm32f479'
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/rt nucleo-f429zi' ARGS="--release --target=thumbv7em-none-eabihf --example=pktgen"
+      env: FEATURES='stm32f429' ARGS="--release --target=thumbv7em-none-eabihf --example=pktgen"
     - rust: nightly
-      env: FEATURES='stm32f4xx-hal/rt nucleo-f429zi smoltcp-phy' ARGS="--release --target=thumbv7em-none-eabihf --example=ip"
+      env: FEATURES='stm32f429 smoltcp-phy smoltcp-log smoltcp-verbose' ARGS="--release --target=thumbv7em-none-eabihf --example=ip"
 script:
   - "cargo build --target=`uname -m`-unknown-linux-gnu --no-default-features --features \"$FEATURES\""

run.sh

@@ -13,7 +13,7 @@ if [[ "$EXAMPLE" = "" ]]; then
 fi
 
 cargo build --target=thumbv7em-none-eabihf --release \
-      --features="stm32f4xx-hal/rt nucleo-f429zi smoltcp-phy" \
+      --features="stm32f429 smoltcp-phy smoltcp-log smoltcp-verbose" \
       --example=$EXAMPLE \
     || exit 1
 

src/lib.rs

@@ -21,7 +21,7 @@ use rx::{RxPacket, RxRing, RxRingEntry};
 mod tx;
 pub use tx::{TxDescriptor, TxError};
 use tx::{TxRing, TxRingEntry};
-mod setup;
+pub mod setup;
 pub use setup::EthPins;
 use setup::{
     AlternateVeryHighSpeed, RmiiCrsDv, RmiiRefClk, RmiiRxD0, RmiiRxD1, RmiiTxD0, RmiiTxD1,
@@ -121,10 +121,10 @@ impl<'rx, 'tx> Eth<'rx, 'tx> {
 
     fn init(&mut self, clocks: Clocks) -> Result<(), WrongClock> {
         let clock_range = match clocks.hclk().0 {
-            60_000_000..=99_000_000 => ETH_MACMIIAR_CR_HCLK_DIV_42,
-            100_000_000..=149_000_000 => ETH_MACMIIAR_CR_HCLK_DIV_62,
-            25_000_000..=34_000_000 => ETH_MACMIIAR_CR_HCLK_DIV_16,
-            35_000_000..=59_000_000 => ETH_MACMIIAR_CR_HCLK_DIV_26,
+            60_000_000..=99_999_999 => ETH_MACMIIAR_CR_HCLK_DIV_42,
+            100_000_000..=149_999_999 => ETH_MACMIIAR_CR_HCLK_DIV_62,
+            25_000_000..=34_999_999 => ETH_MACMIIAR_CR_HCLK_DIV_16,
+            35_000_000..=59_999_999 => ETH_MACMIIAR_CR_HCLK_DIV_26,
             150_000_000..=168_000_000 => ETH_MACMIIAR_CR_HCLK_DIV_102,
             _ => return Err(WrongClock),
         };