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1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- `Serial::usart1/2/3` -> `Serial::new`.
- `Serial` implements `Write<WORD>` and `Read<WORD>` for `WORD` simultaneously as u8 and u16.
- Bump bxcan version to [v0.7.0](https://github.com/stm32-rs/bxcan/releases/tag/v0.7.0)
- PWM timer auto reload value is now preloaded/buffered

### Added

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8 changes: 4 additions & 4 deletions src/timer.rs
Original file line number Diff line number Diff line change
Expand Up @@ -400,7 +400,7 @@ macro_rules! hal {
}
#[inline(always)]
fn start_one_pulse(&mut self) {
self.cr1.write(|w| unsafe { w.bits(1 << 3) }.cen().set_bit());
self.cr1.modify(|_, w| w.opm().set_bit().cen().set_bit());
}
#[inline(always)]
fn cr1_reset(&mut self) {
Expand Down Expand Up @@ -460,7 +460,7 @@ macro_rules! with_pwm {

#[inline(always)]
fn start_pwm(&mut self) {
self.cr1.write(|w| w.cen().set_bit());
self.cr1.modify(|_, w| w.cen().set_bit());
}

#[inline(always)]
Expand Down Expand Up @@ -512,7 +512,7 @@ macro_rules! with_pwm {

#[inline(always)]
fn start_pwm(&mut self) {
self.cr1.write(|w| w.cen().set_bit());
self.cr1.modify(|_, w| w.cen().set_bit());
}

#[inline(always)]
Expand Down Expand Up @@ -565,7 +565,7 @@ macro_rules! with_pwm {
#[inline(always)]
fn start_pwm(&mut self) {
$(let $aoe = self.bdtr.modify(|_, w| w.aoe().set_bit());)?
self.cr1.write(|w| w.cen().set_bit());
self.cr1.modify(|_, w| w.cen().set_bit());
}

#[inline(always)]
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