&Clocks instead of Clocks

CHANGELOG.md

@@ -14,6 +14,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Replace UB code by a legitimate pointer access [#480]
 - Fix flash error flag clearing [#489]
 - Clarify README for windows users [#496]
+- Take `&Clocks` instead of `Clocks`
 
 ### Added
 

Cargo.toml

@@ -56,7 +56,7 @@ panic-itm = "0.4.2"
 cortex-m-rtic = "1.1.3"
 cortex-m-semihosting = "0.5.0"
 heapless = "0.7.16"
-mfrc522 = "0.3.0"
+mfrc522 = "0.5.0"
 usb-device = "0.2.8"
 usbd-serial = "0.1.1"
 

examples/adc-dma-circ.rs

@@ -28,7 +28,7 @@ fn main() -> ! {
     let dma_ch1 = p.DMA1.split().1;
 
     // Setup ADC
-    let adc1 = adc::Adc::adc1(p.ADC1, clocks);
+    let adc1 = adc::Adc::adc1(p.ADC1, &clocks);
 
     // Setup GPIOA
     let mut gpioa = p.GPIOA.split();

examples/adc-dma-rx.rs

@@ -28,7 +28,7 @@ fn main() -> ! {
     let dma_ch1 = p.DMA1.split().1;
 
     // Setup ADC
-    let adc1 = adc::Adc::adc1(p.ADC1, clocks);
+    let adc1 = adc::Adc::adc1(p.ADC1, &clocks);
 
     // Setup GPIOA
     let mut gpioa = p.GPIOA.split();

examples/adc.rs

@@ -25,10 +25,10 @@ fn main() -> ! {
     hprintln!("adc freq: {}", clocks.adcclk());
 
     // Setup ADC
-    let mut adc1 = adc::Adc::adc1(p.ADC1, clocks);
+    let mut adc1 = adc::Adc::adc1(p.ADC1, &clocks);
 
     #[cfg(any(feature = "stm32f103", feature = "connectivity"))]
-    let mut adc2 = adc::Adc::adc2(p.ADC2, clocks);
+    let mut adc2 = adc::Adc::adc2(p.ADC2, &clocks);
 
     // Setup GPIOB
     let mut gpiob = p.GPIOB.split();

examples/adc_temperature.rs

@@ -38,7 +38,7 @@ fn main() -> ! {
     hprintln!("adc freq: {}", clocks.adcclk());
 
     // Setup ADC
-    let mut adc = adc::Adc::adc1(p.ADC1, clocks);
+    let mut adc = adc::Adc::adc1(p.ADC1, &clocks);
 
     // Read temperature sensor
     loop {

examples/mfrc522.rs

@@ -7,7 +7,6 @@ use panic_itm as _;
 use cortex_m::iprintln;
 
 use cortex_m_rt::entry;
-use embedded_hal_02::digital::v1_compat::OldOutputPin;
 use embedded_hal_02::spi::{Mode, Phase, Polarity};
 use mfrc522::Mfrc522;
 use stm32f1xx_hal::{pac, prelude::*, spi::Spi};
@@ -39,11 +38,11 @@ fn main() -> ! {
         &mut afio.mapr,
         MODE,
         1.MHz(),
-        clocks,
+        &clocks,
     );
 
     let nss = gpioa.pa4.into_push_pull_output(&mut gpioa.crl);
-    let mut mfrc522 = Mfrc522::new(spi, OldOutputPin::from(nss)).unwrap();
+    let mut mfrc522 = Mfrc522::new(spi).with_nss(nss).init().unwrap();
 
     let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
     led.set_high();

examples/spi-dma.rs

@@ -40,7 +40,7 @@ fn main() -> ! {
         polarity: Polarity::IdleLow,
         phase: Phase::CaptureOnFirstTransition,
     };
-    let spi = Spi::spi2(dp.SPI2, pins, spi_mode, 100.kHz(), clocks);
+    let spi = Spi::spi2(dp.SPI2, pins, spi_mode, 100.kHz(), &clocks);
 
     // Set up the DMA device
     let dma = dp.DMA1.split();

examples/spi-slave.rs

@@ -67,7 +67,7 @@ fn main() -> ! {
         &mut afio.mapr,
         MODE,
         10.kHz(),
-        clocks,
+        &clocks,
     );
 
     // SPI2

examples/spi.rs

@@ -46,7 +46,7 @@ fn setup() -> (
         &mut afio.mapr,
         MODE,
         1.MHz(),
-        clocks,
+        &clocks,
     );
 
     (spi, cs)

src/adc.rs

@@ -2,6 +2,7 @@
 
 use core::marker::PhantomData;
 use embedded_hal_02::adc::{Channel, OneShot};
+use fugit::HertzU32 as Hertz;
 
 #[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
 use crate::dma::dma2;
@@ -25,7 +26,8 @@
     rb: ADC,
     sample_time: SampleTime,
     align: Align,
-    clocks: Clocks,
+    sysclk: Hertz,
+    adcclk: Hertz,
 }
 
 /// ADC sampling time
@@ -183,12 +185,13 @@
                 ///
                 /// Sets all configurable parameters to one-shot defaults,
                 /// performs a boot-time calibration.
-                pub fn $adc(adc: $ADC, clocks: Clocks) -> Self {
+                pub fn $adc(adc: $ADC, clocks: &Clocks) -> Self {
                     let mut s = Self {
                         rb: adc,
                         sample_time: SampleTime::default(),
                         align: Align::default(),
-                        clocks,
+                        sysclk: clocks.sysclk(),
+                        adcclk: clocks.adcclk(),
                     };
                     s.enable_clock();
                     s.power_down();
@@ -199,9 +202,9 @@
                     // The manual states that we need to wait two ADC clocks cycles after power-up
                     // before starting calibration, we already delayed in the power-up process, but
                     // if the adc clock is too low that was not enough.
-                    if s.clocks.adcclk() < kHz(2500) {
-                        let two_adc_cycles = s.clocks.sysclk() / s.clocks.adcclk() * 2;
-                        let already_delayed = s.clocks.sysclk() / kHz(800);
+                    if s.adcclk < kHz(2500) {
+                        let two_adc_cycles = s.sysclk / s.adcclk * 2;
+                        let already_delayed = s.sysclk / kHz(800);
                         if two_adc_cycles > already_delayed {
                             delay(two_adc_cycles - already_delayed);
                         }
@@ -246,7 +249,7 @@
                 /// Returns the largest possible sample value for the current settings
                 pub fn max_sample(&self) -> u16 {
                     match self.align {
                         Align::Left => u16::max_value(),
                         Align::Right => (1 << 12) - 1,
                     }
                 }
@@ -263,7 +266,7 @@
                     // this time can be found in the datasheets.
                     // Here we are delaying for approximately 1us, considering 1.25 instructions per
                     // cycle. Do we support a chip which needs more than 1us ?
-                    delay(self.clocks.sysclk() / kHz(800));
+                    delay(self.sysclk / kHz(800));
                 }
 
                 fn power_down(&mut self) {
@@ -463,7 +466,7 @@
             // sensor, this time can be found in the datasheets.
             // Here we are delaying for approximately 10us, considering 1.25 instructions per
             // cycle. Do we support a chip which needs more than 10us ?
-            delay(self.clocks.sysclk().raw() / 80_000);
+            delay(self.sysclk.raw() / 80_000);
             true
         } else {
             false
@@ -503,7 +506,7 @@
         // recommended ADC sampling for temperature sensor is 17.1 usec,
         // so use the following approximate settings
         // to support all ADC frequencies
-        let sample_time = match self.clocks.adcclk().raw() {
+        let sample_time = match self.adcclk.raw() {
             0..=1_200_000 => SampleTime::T_1,
             1_200_001..=1_500_000 => SampleTime::T_7,
             1_500_001..=2_400_000 => SampleTime::T_13,

src/i2c.rs

@@ -141,7 +141,7 @@ impl<PINS> I2c<I2C1, PINS> {
         pins: PINS,
         mapr: &mut MAPR,
         mode: M,
-        clocks: Clocks,
+        clocks: &Clocks,
     ) -> Self
     where
         PINS: Pins<I2C1>,
@@ -153,7 +153,7 @@ impl<PINS> I2c<I2C1, PINS> {
 
 impl<PINS> I2c<I2C2, PINS> {
     /// Creates a generic I2C2 object on pins PB10 and PB11 using the embedded-hal `BlockingI2c` trait.
-    pub fn i2c2<M: Into<Mode>>(i2c: I2C2, pins: PINS, mode: M, clocks: Clocks) -> Self
+    pub fn i2c2<M: Into<Mode>>(i2c: I2C2, pins: PINS, mode: M, clocks: &Clocks) -> Self
     where
         PINS: Pins<I2C2>,
     {
@@ -166,13 +166,13 @@ where
     I2C: Instance,
 {
     /// Configures the I2C peripheral to work in master mode
-    fn configure<M: Into<Mode>>(i2c: I2C, pins: PINS, mode: M, clocks: Clocks) -> Self {
+    fn configure<M: Into<Mode>>(i2c: I2C, pins: PINS, mode: M, clocks: &Clocks) -> Self {
         let mode = mode.into();
         let rcc = unsafe { &(*RCC::ptr()) };
         I2C::enable(rcc);
         I2C::reset(rcc);
 
-        let pclk1 = I2C::clock(&clocks);
+        let pclk1 = I2C::clock(clocks);
 
         assert!(mode.get_frequency() <= kHz(400));
 

src/i2c/blocking.rs

@@ -25,7 +25,7 @@ impl<PINS> BlockingI2c<I2C1, PINS> {
         pins: PINS,
         mapr: &mut MAPR,
         mode: M,
-        clocks: Clocks,
+        clocks: &Clocks,
         start_timeout_us: u32,
         start_retries: u8,
         addr_timeout_us: u32,
@@ -55,7 +55,7 @@ impl<PINS> BlockingI2c<I2C2, PINS> {
         i2c: I2C2,
         pins: PINS,
         mode: M,
-        clocks: Clocks,
+        clocks: &Clocks,
         start_timeout_us: u32,
         start_retries: u8,
         addr_timeout_us: u32,
@@ -85,7 +85,7 @@ impl<I2C, PINS> I2c<I2C, PINS> {
         start_retries: u8,
         addr_timeout_us: u32,
         data_timeout_us: u32,
-        clocks: Clocks,
+        clocks: &Clocks,
     ) -> BlockingI2c<I2C, PINS> {
         let sysclk_mhz = clocks.sysclk().to_MHz();
         BlockingI2c {
@@ -98,7 +98,7 @@ impl<I2C, PINS> I2c<I2C, PINS> {
             },
         }
     }
-    pub fn blocking_default(self, clocks: Clocks) -> BlockingI2c<I2C, PINS> {
+    pub fn blocking_default(self, clocks: &Clocks) -> BlockingI2c<I2C, PINS> {
         let sysclk_mhz = clocks.sysclk().to_MHz();
         BlockingI2c {
             nb: self,
@@ -169,7 +169,7 @@ impl<I2C: Instance, PINS> BlockingI2c<I2C, PINS> {
         i2c: I2C,
         pins: PINS,
         mode: M,
-        clocks: Clocks,
+        clocks: &Clocks,
         start_timeout_us: u32,
         start_retries: u8,
         addr_timeout_us: u32,

src/rcc/enable.rs

@@ -184,7 +184,7 @@
     TIM11 => (APB2, 21),
 }
 
-#[cfg(any(feature = "stm32f102", feature = "stm32f103"))]
+#[cfg(any(feature = "stm32f103"))] // feature = "stm32f102"
 bus! {
     USB => (APB1, 23),
 }

src/spi.rs

@@ -222,7 +222,7 @@
         mapr: &mut MAPR,
         mode: impl Into<Mode>,
         freq: Hertz,
-        clocks: Clocks,
+        clocks: &Clocks,
     ) -> Self
     where
         REMAP: Remap<Periph = pac::SPI1>,
@@ -259,7 +259,7 @@
 
       You can also use `NoSck`, `NoMiso` or `NoMosi` if you don't want to use the pins
     */
-    pub fn spi2(spi: pac::SPI2, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self
+    pub fn spi2(spi: pac::SPI2, pins: PINS, mode: Mode, freq: Hertz, clocks: &Clocks) -> Self
     where
         REMAP: Remap<Periph = pac::SPI2>,
         PINS: Pins<REMAP>,
@@ -295,7 +295,7 @@
       You can also use `NoSck`, `NoMiso` or `NoMosi` if you don't want to use the pins
     */
     #[cfg(not(feature = "connectivity"))]
-    pub fn spi3(spi: pac::SPI3, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self
+    pub fn spi3(spi: pac::SPI3, pins: PINS, mode: Mode, freq: Hertz, clocks: &Clocks) -> Self
     where
         REMAP: Remap<Periph = pac::SPI3>,
         PINS: Pins<REMAP>,
@@ -317,7 +317,7 @@
         mapr: &mut MAPR,
         mode: Mode,
         freq: Hertz,
-        clocks: Clocks,
+        clocks: &Clocks,
     ) -> Self
     where
         REMAP: Remap<Periph = pac::SPI3>,
@@ -484,7 +484,13 @@
 where
     SPI: Instance,
 {
-    fn configure(spi: SPI, pins: PINS, mode: impl Into<Mode>, freq: Hertz, clocks: Clocks) -> Self {
+    fn configure(
+        spi: SPI,
+        pins: PINS,
+        mode: impl Into<Mode>,
+        freq: Hertz,
+        clocks: &Clocks,
+    ) -> Self {
         let mode = mode.into();
         // enable or reset SPI
         let rcc = unsafe { &(*RCC::ptr()) };
@@ -494,7 +500,7 @@
         // disable SS output
         spi.cr2.write(|w| w.ssoe().clear_bit());
 
         let br = match SPI::clock(&clocks) / freq {
             0 => unreachable!(),
             1..=2 => 0b000,
             3..=5 => 0b001,

src/time.rs

@@ -129,7 +129,7 @@ pub struct MonoTimer {
 
 impl MonoTimer {
     /// Creates a new `Monotonic` timer
-    pub fn new(mut dwt: DWT, mut dcb: DCB, clocks: Clocks) -> Self {
+    pub fn new(mut dwt: DWT, mut dcb: DCB, clocks: &Clocks) -> Self {
         dcb.enable_trace();
         dwt.enable_cycle_counter();