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49 changes: 20 additions & 29 deletions src/afio.rs
Original file line number Diff line number Diff line change
Expand Up @@ -18,16 +18,13 @@ impl AfioExt for AFIO {
AFIO::reset(rcc);

Parts {
evcr: EVCR { _0: () },
mapr: MAPR {
_0: (),
jtag_enabled: true,
},
exticr1: EXTICR1 { _0: () },
exticr2: EXTICR2 { _0: () },
exticr3: EXTICR3 { _0: () },
exticr4: EXTICR4 { _0: () },
mapr2: MAPR2 { _0: () },
evcr: EVCR,
mapr: MAPR { jtag_enabled: true },
exticr1: EXTICR1,
exticr2: EXTICR2,
exticr3: EXTICR3,
exticr4: EXTICR4,
mapr2: MAPR2,
}
}
}
Expand All @@ -51,9 +48,8 @@ pub struct Parts {
pub mapr2: MAPR2,
}

pub struct EVCR {
_0: (),
}
#[non_exhaustive]
pub struct EVCR;

impl EVCR {
pub fn evcr(&mut self) -> &afio::EVCR {
Expand All @@ -71,8 +67,8 @@ impl EVCR {
/// let mut afio = dp.AFIO.constrain();
/// function_using_mapr(&mut afio.mapr);
/// ```
#[non_exhaustive]
pub struct MAPR {
_0: (),
jtag_enabled: bool,
}

Expand Down Expand Up @@ -111,49 +107,44 @@ impl MAPR {
}
}

pub struct EXTICR1 {
_0: (),
}
#[non_exhaustive]
pub struct EXTICR1;

impl EXTICR1 {
pub fn exticr1(&mut self) -> &afio::EXTICR1 {
unsafe { (*AFIO::ptr()).exticr1() }
}
}

pub struct EXTICR2 {
_0: (),
}
#[non_exhaustive]
pub struct EXTICR2;

impl EXTICR2 {
pub fn exticr2(&mut self) -> &afio::EXTICR2 {
unsafe { (*AFIO::ptr()).exticr2() }
}
}

pub struct EXTICR3 {
_0: (),
}
#[non_exhaustive]
pub struct EXTICR3;

impl EXTICR3 {
pub fn exticr3(&mut self) -> &afio::EXTICR3 {
unsafe { (*AFIO::ptr()).exticr3() }
}
}

pub struct EXTICR4 {
_0: (),
}
#[non_exhaustive]
pub struct EXTICR4;

impl EXTICR4 {
pub fn exticr4(&mut self) -> &afio::EXTICR4 {
unsafe { (*AFIO::ptr()).exticr4() }
}
}

pub struct MAPR2 {
_0: (),
}
#[non_exhaustive]
pub struct MAPR2;

impl MAPR2 {
pub fn mapr2(&mut self) -> &afio::MAPR2 {
Expand Down
5 changes: 3 additions & 2 deletions src/dma.rs
Original file line number Diff line number Diff line change
Expand Up @@ -137,7 +137,8 @@ macro_rules! dma {
/// A singleton that represents a single DMAx channel (channel X in this case)
///
/// This singleton has exclusive access to the registers of the DMAx channel X
pub struct $CX { _0: () }
#[non_exhaustive]
pub struct $CX;

impl $CX {
/// Associated peripheral `address`
Expand Down Expand Up @@ -456,7 +457,7 @@ macro_rules! dma {
self.$chX().cr().reset();
)+

Channels((), $($CX { _0: () }),+)
Channels((), $($CX),+)
}
}
}
Expand Down
56 changes: 24 additions & 32 deletions src/flash.rs
Original file line number Diff line number Diff line change
Expand Up @@ -309,14 +309,14 @@ pub trait FlashExt {
impl FlashExt for FLASH {
fn constrain(self) -> Parts {
Parts {
acr: ACR { _0: () },
ar: AR { _0: () },
cr: CR { _0: () },
keyr: KEYR { _0: () },
_obr: OBR { _0: () },
_optkeyr: OPTKEYR { _0: () },
sr: SR { _0: () },
_wrpr: WRPR { _0: () },
acr: ACR,
ar: AR,
cr: CR,
keyr: KEYR,
_obr: OBR,
_optkeyr: OPTKEYR,
sr: SR,
_wrpr: WRPR,
}
}
}
Expand Down Expand Up @@ -359,9 +359,8 @@ impl Parts {
}

/// Opaque ACR register
pub struct ACR {
_0: (),
}
#[non_exhaustive]
pub struct ACR;

#[allow(dead_code)]
impl ACR {
Expand All @@ -372,9 +371,8 @@ impl ACR {
}

/// Opaque AR register
pub struct AR {
_0: (),
}
#[non_exhaustive]
pub struct AR;

#[allow(dead_code)]
impl AR {
Expand All @@ -385,9 +383,8 @@ impl AR {
}

/// Opaque CR register
pub struct CR {
_0: (),
}
#[non_exhaustive]
pub struct CR;

#[allow(dead_code)]
impl CR {
Expand All @@ -398,9 +395,8 @@ impl CR {
}

/// Opaque KEYR register
pub struct KEYR {
_0: (),
}
#[non_exhaustive]
pub struct KEYR;

#[allow(dead_code)]
impl KEYR {
Expand All @@ -411,9 +407,8 @@ impl KEYR {
}

/// Opaque OBR register
pub struct OBR {
_0: (),
}
#[non_exhaustive]
pub struct OBR;

#[allow(dead_code)]
impl OBR {
Expand All @@ -424,9 +419,8 @@ impl OBR {
}

/// Opaque OPTKEYR register
pub struct OPTKEYR {
_0: (),
}
#[non_exhaustive]
pub struct OPTKEYR;

#[allow(dead_code)]
impl OPTKEYR {
Expand All @@ -437,9 +431,8 @@ impl OPTKEYR {
}

/// Opaque SR register
pub struct SR {
_0: (),
}
#[non_exhaustive]
pub struct SR;

#[allow(dead_code)]
impl SR {
Expand All @@ -450,9 +443,8 @@ impl SR {
}

/// Opaque WRPR register
pub struct WRPR {
_0: (),
}
#[non_exhaustive]
pub struct WRPR;

#[allow(dead_code)]
impl WRPR {
Expand Down
22 changes: 9 additions & 13 deletions src/rcc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ impl RccExt for RCC {
sysclk: None,
adcclk: None,
},
bkp: BKP { _0: () },
bkp: BKP,
}
}
}
Expand All @@ -49,9 +49,8 @@ pub struct Rcc {
}

/// AMBA High-performance Bus (AHB) registers
pub struct AHB {
_0: (),
}
#[non_exhaustive]
pub struct AHB;

impl AHB {
fn enr(rcc: &rcc::RegisterBlock) -> &rcc::AHBENR {
Expand All @@ -60,9 +59,8 @@ impl AHB {
}

/// Advanced Peripheral Bus 1 (APB1) registers
pub struct APB1 {
_0: (),
}
#[non_exhaustive]
pub struct APB1;

impl APB1 {
fn enr(rcc: &rcc::RegisterBlock) -> &rcc::APB1ENR {
Expand All @@ -83,9 +81,8 @@ impl APB1 {
}

/// Advanced Peripheral Bus 2 (APB2) registers
pub struct APB2 {
_0: (),
}
#[non_exhaustive]
pub struct APB2;

impl APB2 {
fn enr(rcc: &rcc::RegisterBlock) -> &rcc::APB2ENR {
Expand Down Expand Up @@ -319,9 +316,8 @@ impl CFGR {
}
}

pub struct BKP {
_0: (),
}
#[non_exhaustive]
pub struct BKP;

impl BKP {
/// Enables write access to the registers in the backup domain
Expand Down
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