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Merged
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Oct 6, 2024
Merged

simplify timer macros for rustfmt #508

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8 changes: 4 additions & 4 deletions src/adc.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ use core::marker::PhantomData;
use embedded_hal_02::adc::{Channel, OneShot};
use fugit::HertzU32 as Hertz;

#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
use crate::dma::dma2;
use crate::dma::{dma1, CircBuffer, Receive, RxDma, Transfer, TransferPayload, W};
use crate::gpio::{self, Analog};
Expand Down Expand Up @@ -153,7 +153,7 @@ adc_pins!(pac::ADC2,
gpio::PC5<Analog> => 15,
);

#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
adc_pins!(pac::ADC3,
gpio::PA0<Analog> => 0,
gpio::PA1<Analog> => 1,
Expand Down Expand Up @@ -548,7 +548,7 @@ adc_hal! {
pac::ADC2: (adc2),
}

#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
adc_hal! {
pac::ADC3: (adc3),
}
Expand Down Expand Up @@ -810,7 +810,7 @@ adcdma! {
)
}

#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
adcdma! {
pac::ADC3: (
AdcDma3,
Expand Down
133 changes: 61 additions & 72 deletions src/qei.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -6,11 +6,7 @@
*/
use core::marker::PhantomData;

#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))]
use crate::pac::TIM1;
#[cfg(feature = "medium")]
use crate::pac::TIM4;
use crate::pac::{TIM2, TIM3};
use crate::pac;
use embedded_hal_02 as hal;
pub use hal::Direction;

Expand Down Expand Up @@ -70,16 +66,16 @@ pub struct Qei<TIM, REMAP, PINS> {
_remap: PhantomData<REMAP>,
}

#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))]
impl Timer<TIM1> {
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
impl Timer<pac::TIM1> {
pub fn qei<REMAP, PINS>(
self,
pins: PINS,
mapr: &mut MAPR,
options: QeiOptions,
) -> Qei<TIM1, REMAP, PINS>
) -> Qei<pac::TIM1, REMAP, PINS>
where
REMAP: Remap<Periph = TIM1>,
REMAP: Remap<Periph = pac::TIM1>,
PINS: Pins<REMAP>,
{
mapr.modify_mapr(|_, w| unsafe { w.tim1_remap().bits(REMAP::REMAP) });
Expand All @@ -89,15 +85,15 @@ impl Timer<TIM1> {
}
}

impl Timer<TIM2> {
impl Timer<pac::TIM2> {
pub fn qei<REMAP, PINS>(
self,
pins: PINS,
mapr: &mut MAPR,
options: QeiOptions,
) -> Qei<TIM2, REMAP, PINS>
) -> Qei<pac::TIM2, REMAP, PINS>
where
REMAP: Remap<Periph = TIM2>,
REMAP: Remap<Periph = pac::TIM2>,
PINS: Pins<REMAP>,
{
mapr.modify_mapr(|_, w| unsafe { w.tim2_remap().bits(REMAP::REMAP) });
Expand All @@ -107,15 +103,15 @@ impl Timer<TIM2> {
}
}

impl Timer<TIM3> {
impl Timer<pac::TIM3> {
pub fn qei<REMAP, PINS>(
self,
pins: PINS,
mapr: &mut MAPR,
options: QeiOptions,
) -> Qei<TIM3, REMAP, PINS>
) -> Qei<pac::TIM3, REMAP, PINS>
where
REMAP: Remap<Periph = TIM3>,
REMAP: Remap<Periph = pac::TIM3>,
PINS: Pins<REMAP>,
{
mapr.modify_mapr(|_, w| unsafe { w.tim3_remap().bits(REMAP::REMAP) });
Expand All @@ -126,15 +122,15 @@ impl Timer<TIM3> {
}

#[cfg(feature = "medium")]
impl Timer<TIM4> {
impl Timer<pac::TIM4> {
pub fn qei<REMAP, PINS>(
self,
pins: PINS,
mapr: &mut MAPR,
options: QeiOptions,
) -> Qei<TIM4, REMAP, PINS>
) -> Qei<pac::TIM4, REMAP, PINS>
where
REMAP: Remap<Periph = TIM4>,
REMAP: Remap<Periph = pac::TIM4>,
PINS: Pins<REMAP>,
{
mapr.modify_mapr(|_, w| w.tim4_remap().bit(REMAP::REMAP == 1));
Expand All @@ -145,68 +141,61 @@ impl Timer<TIM4> {
}

macro_rules! hal {
($($TIMX:ident: ($timX:ident, $timXen:ident, $timXrst:ident),)+) => {
$(
impl<REMAP, PINS> Qei<$TIMX, REMAP, PINS> {
fn $timX(tim: $TIMX, pins: PINS, options: QeiOptions) -> Self {
// Configure TxC1 and TxC2 as captures
tim.ccmr1_input().write(|w| w.cc1s().ti1().cc2s().ti2());

// enable and configure to capture on rising edge
tim.ccer().write(|w| {
w.cc1e()
.set_bit()
.cc1p()
.clear_bit()
.cc2e()
.set_bit()
.cc2p()
.clear_bit()
});

// configure as quadrature encoder
tim.smcr().write(|w| w.sms().set(options.slave_mode as u8));

tim.arr().write(|w| w.arr().set(options.auto_reload_value));
tim.cr1().write(|w| w.cen().set_bit());

Qei { tim, pins, _remap: PhantomData }
($TIMX:ty: $timX:ident, $timXen:ident, $timXrst:ident) => {
impl<REMAP, PINS> Qei<$TIMX, REMAP, PINS> {
fn $timX(tim: $TIMX, pins: PINS, options: QeiOptions) -> Self {
// Configure TxC1 and TxC2 as captures
tim.ccmr1_input().write(|w| w.cc1s().ti1().cc2s().ti2());

// enable and configure to capture on rising edge
tim.ccer().write(|w| {
w.cc1e().set_bit();
w.cc1p().clear_bit();
w.cc2e().set_bit();
w.cc2p().clear_bit()
});

// configure as quadrature encoder
tim.smcr().write(|w| w.sms().set(options.slave_mode as u8));

tim.arr().write(|w| w.arr().set(options.auto_reload_value));
tim.cr1().write(|w| w.cen().set_bit());

Qei {
tim,
pins,
_remap: PhantomData,
}
}

pub fn release(self) -> ($TIMX, PINS) {
(self.tim, self.pins)
}
pub fn release(self) -> ($TIMX, PINS) {
(self.tim, self.pins)
}
}

impl<REMAP, PINS> hal::Qei for Qei<$TIMX, REMAP, PINS> {
type Count = u16;
impl<REMAP, PINS> hal::Qei for Qei<$TIMX, REMAP, PINS> {
type Count = u16;

fn count(&self) -> u16 {
self.tim.cnt().read().cnt().bits()
}
fn count(&self) -> u16 {
self.tim.cnt().read().cnt().bits()
}

fn direction(&self) -> Direction {
if self.tim.cr1().read().dir().bit_is_clear() {
Direction::Upcounting
} else {
Direction::Downcounting
}
fn direction(&self) -> Direction {
if self.tim.cr1().read().dir().bit_is_clear() {
Direction::Upcounting
} else {
Direction::Downcounting
}
}

)+
}
}
};
}

#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))]
hal! {
TIM1: (_tim1, tim1en, tim1rst),
}
hal! {
TIM2: (_tim2, tim2en, tim2rst),
TIM3: (_tim3, tim3en, tim3rst),
}
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
hal!(pac::TIM1: _tim1, tim1en, tim1rst);

hal!(pac::TIM2: _tim2, tim2en, tim2rst);
hal!(pac::TIM3: _tim3, tim3en, tim3rst);

#[cfg(feature = "medium")]
hal! {
TIM4: (_tim4, tim4en, tim4rst),
}
hal!(pac::TIM4: _tim4, tim4en, tim4rst);
4 changes: 2 additions & 2 deletions src/rcc/enable.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -165,14 +165,14 @@ bus! {
TIM5 => (APB1, 3),
}

#[cfg(any(feature = "xl", all(feature = "stm32f100", feature = "high",)))]
#[cfg(any(feature = "xl", all(feature = "stm32f100", feature = "high")))]
bus! {
TIM12 => (APB1, 6),
TIM13 => (APB1, 7),
TIM14 => (APB1, 8),
}

#[cfg(all(feature = "stm32f103", feature = "high",))]
#[cfg(all(feature = "stm32f103", feature = "high"))]
bus! {
TIM8 => (APB2, 13),
}
Expand Down
10 changes: 5 additions & 5 deletions src/timer.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -751,19 +751,19 @@ hal!(
pac::TIM3: [Timer3, u16, dbg_tim3_stop, c: (CH4), m: tim2,],
);

#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))]
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
hal!(
pac::TIM1: [Timer1, u16, dbg_tim1_stop, c: (CH4, _aoe), m: tim1,],
);

#[cfg(any(feature = "stm32f100", feature = "high", feature = "connectivity",))]
#[cfg(any(feature = "stm32f100", feature = "high", feature = "connectivity"))]
hal! {
pac::TIM6: [Timer6, u16, dbg_tim6_stop, m: tim6,],
}

#[cfg(any(
all(feature = "high", any(feature = "stm32f101", feature = "stm32f103",),),
any(feature = "stm32f100", feature = "connectivity",)
all(feature = "high", any(feature = "stm32f101", feature = "stm32f103")),
any(feature = "stm32f100", feature = "connectivity")
))]
hal! {
pac::TIM7: [Timer7, u16, dbg_tim7_stop, m: tim6,],
Expand All @@ -786,7 +786,7 @@ hal! {
pac::TIM5: [Timer5, u16, dbg_tim5_stop, c: (CH4), m: tim2,],
}

#[cfg(all(feature = "stm32f103", feature = "high",))]
#[cfg(all(feature = "stm32f103", feature = "high"))]
hal! {
pac::TIM8: [Timer8, u16, dbg_tim8_stop, c: (CH4, _aoe), m: tim1,],
}
Expand Down
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