stm32-rs · burrbull · Oct 14, 2024 · Oct 12, 2024 · Oct 14, 2024
diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -10,11 +10,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 ### Breaking changes
 
 - Relax pin type generics for `Serial`, `I2c`, `Spi`, `Can`. [#462]
-  Use enums of pin tuples and `Enum::from<(tuple)>` for pin remap before passing to peripheral.
+  ~~Use enums of pin tuples and `Enum::from<(tuple)>` for pin remap before passing to peripheral.~~
+  Use pin enums and `impl RInto<(enum), R>` for peripheral constructors.
+  Add `RInto` trait and `Rmp` peripheral wrapper, add `remap` for peripherals. [#514]
   Remove `RemapStruct`s. [#462] [#506] [#509]
 - Use independent `Spi` and `SpiSlave` structures instead of `OP` generic [#462]
 - Take `&Clocks` instead of `Clocks` [#498]
 - Temporary replace `stm32f1` with `stm32f1-staging` [#503]
+- `Spi` now takes `Option<PIN>` for `SCK`, `MISO`, `MOSI` [#514]
 
 ### Changed
 
@@ -62,6 +65,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#509]: https://github.com/stm32-rs/stm32f1xx-hal/pull/509
 [#510]: https://github.com/stm32-rs/stm32f1xx-hal/pull/510
 [#511]: https://github.com/stm32-rs/stm32f1xx-hal/pull/511
+[#514]: https://github.com/stm32-rs/stm32f1xx-hal/pull/514
 
 ## [v0.10.0] - 2022-12-12
 

diff --git a/examples/can-echo.rs b/examples/can-echo.rs
@@ -24,8 +24,6 @@ fn main() -> ! {
     // Other boards might have a crystal with another frequency or none at all.
     rcc.cfgr.use_hse(8.MHz()).freeze(&mut flash.acr);
 
-    let mut afio = dp.AFIO.constrain();
-
     let mut can1 = {
         let gpioa = dp.GPIOA.split();
         let rx = gpioa.pa11;
@@ -34,7 +32,7 @@ fn main() -> ! {
         let can = dp.CAN1.can(
             #[cfg(not(feature = "connectivity"))]
             dp.USB,
-            (tx, rx, &mut afio.mapr),
+            (tx, rx),
         );
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
@@ -51,7 +49,7 @@ fn main() -> ! {
     #[cfg(feature = "connectivity")]
     let _can2 = {
         let gpiob = dp.GPIOB.split();
-        let can = dp.CAN2.can((gpiob.pb6, gpiob.pb5, &mut afio.mapr));
+        let can = dp.CAN2.can((gpiob.pb6, gpiob.pb5));
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/

diff --git a/examples/can-rtic.rs b/examples/can-rtic.rs
@@ -55,7 +55,7 @@ mod app {
     use super::{enqueue_frame, PriorityFrame};
     use bxcan::{filter::Mask32, ExtendedId, Fifo, Frame, Interrupts, Rx0, StandardId, Tx};
     use heapless::binary_heap::{BinaryHeap, Max};
-    use stm32f1xx_hal::{can::Can, gpio::Floating, pac::CAN1, prelude::*};
+    use stm32f1xx_hal::{can::Can, pac::CAN1, prelude::*};
 
     #[local]
     struct Local {
@@ -86,17 +86,12 @@ mod app {
         let gpioa = cx.device.GPIOA.split();
         let can_rx_pin = gpioa.pa11;
         let can_tx_pin = gpioa.pa12;
-        let mut afio = cx.device.AFIO.constrain();
 
         #[cfg(not(feature = "connectivity"))]
-        let can = Can::<_, Floating>::new(
-            cx.device.CAN1,
-            cx.device.USB,
-            (can_tx_pin, can_rx_pin, &mut afio.mapr),
-        );
+        let can = Can::new(cx.device.CAN1, cx.device.USB, (can_tx_pin, can_rx_pin));
 
         #[cfg(feature = "connectivity")]
-        let can = Can::<_, Floating>::new(cx.device.CAN1, (can_tx_pin, can_rx_pin, &mut afio.mapr));
+        let can = Can::new(cx.device.CAN1, (can_tx_pin, can_rx_pin));
 
         // APB1 (PCLK1): 16MHz, Bit rate: 1000kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/

diff --git a/examples/i2c-bme280/Cargo.toml b/examples/i2c-bme280/Cargo.toml
@@ -16,8 +16,7 @@ cortex-m = "0.7.6"
 
 [dependencies.stm32f1xx-hal]
 path = "../.."
-version = "0.9.0"
-features = ["stm32f103", "rt", "stm32-usbd"]
+features = ["stm32f103", "stm32-usbd"]
 
 [profile.dev]
 incremental = false

diff --git a/examples/i2c-bme280/src/main.rs b/examples/i2c-bme280/src/main.rs
@@ -59,23 +59,24 @@ fn main() -> ! {
     // Acquire the GPIOB peripheral
     let mut gpiob = dp.GPIOB.split();
 
-    let scl = gpiob.pb6.into_alternate_open_drain(&mut gpiob.crl);
-    let sda = gpiob.pb7.into_alternate_open_drain(&mut gpiob.crl);
+    let scl = gpiob.pb6;
+    let sda = gpiob.pb7;
 
-    let i2c = BlockingI2c::i2c1(
-        dp.I2C1,
-        (scl, sda),
-        &mut afio.mapr,
-        Mode::Fast {
-            frequency: 400.kHz(),
-            duty_cycle: DutyCycle::Ratio16to9,
-        },
-        clocks,
-        1000,
-        10,
-        1000,
-        1000,
-    );
+    let i2c = dp
+        .I2C1
+        //.remap(&mut afio.mapr) // add this if want to use PB8, PB9 instead
+        .blocking_i2c(
+            (scl, sda),
+            Mode::Fast {
+                frequency: 400.kHz(),
+                duty_cycle: DutyCycle::Ratio16to9,
+            },
+            &clocks,
+            1000,
+            10,
+            1000,
+            1000,
+        );
 
     // The Adafruit boards have address 0x77 without closing the jumper on the back, the BME280 lib connects to 0x77 with `new_secondary`, use
     // `new_primary` for 0x76 if you close the jumper/solder bridge.

diff --git a/examples/mfrc522.rs b/examples/mfrc522.rs
@@ -25,19 +25,18 @@ fn main() -> ! {
 
     let _stim = &mut cp.ITM.stim[0];
     let rcc = dp.RCC.constrain();
-    let mut afio = dp.AFIO.constrain();
     let mut flash = dp.FLASH.constrain();
     let mut gpioa = dp.GPIOA.split();
     let mut gpioc = dp.GPIOC.split();
 
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
-    let sck = gpioa.pa5.into_alternate_push_pull(&mut gpioa.crl);
+    let sck = gpioa.pa5;
     let miso = gpioa.pa6;
-    let mosi = gpioa.pa7.into_alternate_push_pull(&mut gpioa.crl);
+    let mosi = gpioa.pa7;
     let spi = Spi::new(
         dp.SPI1,
-        (sck, miso, mosi, &mut afio.mapr),
+        (Some(sck), Some(miso), Some(mosi)),
         MODE,
         1.MHz(),
         &clocks,

diff --git a/examples/mpu9250.rs b/examples/mpu9250.rs
@@ -24,26 +24,24 @@ fn main() -> ! {
 
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
-    let mut afio = dp.AFIO.constrain();
-
     let mut gpioa = dp.GPIOA.split();
     // let mut gpiob = dp.GPIOB.split();
 
     let nss = gpioa.pa4.into_push_pull_output(&mut gpioa.crl);
 
     // SPI1
-    let sck = gpioa.pa5.into_alternate_push_pull(&mut gpioa.crl);
+    let sck = gpioa.pa5;
     let miso = gpioa.pa6;
-    let mosi = gpioa.pa7.into_alternate_push_pull(&mut gpioa.crl);
+    let mosi = gpioa.pa7;
 
     // SPI2
-    // let sck = gpiob.pb13.into_alternate_push_pull(&mut gpiob.crh);
+    // let sck = gpiob.pb13;
     // let miso = gpiob.pb14;
-    // let mosi = gpiob.pb15.into_alternate_push_pull(&mut gpiob.crh);
+    // let mosi = gpiob.pb15;
 
     let spi = Spi::new(
         dp.SPI1,
-        (sck, miso, mosi, &mut afio.mapr),
+        (Some(sck), Some(miso), Some(mosi)),
         mpu9250::MODE.into(),
         1.MHz(),
         &clocks,

diff --git a/examples/serial-dma-circ.rs b/examples/serial-dma-circ.rs
@@ -26,7 +26,7 @@ fn main() -> ! {
 
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
-    let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain();
     let channels = p.DMA1.split();
 
     let mut gpioa = p.GPIOA.split();
@@ -50,7 +50,7 @@ fn main() -> ! {
 
     let serial = Serial::new(
         p.USART1,
-        (tx, rx, &mut afio.mapr),
+        (tx, rx),
         Config::default().baudrate(9_600.bps()),
         &clocks,
     );

diff --git a/examples/serial-dma-peek.rs b/examples/serial-dma-peek.rs
@@ -25,7 +25,7 @@ fn main() -> ! {
 
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
-    let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain();
     let channels = p.DMA1.split();
 
     let mut gpioa = p.GPIOA.split();
@@ -47,12 +47,7 @@ fn main() -> ! {
     // let tx = gpiob.pb10.into_alternate_push_pull(&mut gpiob.crh);
     // let rx = gpiob.pb11;
 
-    let serial = Serial::new(
-        p.USART1,
-        (tx, rx, &mut afio.mapr),
-        Config::default(),
-        &clocks,
-    );
+    let serial = Serial::new(p.USART1, (tx, rx), Config::default(), &clocks);
 
     let rx = serial.rx.with_dma(channels.5);
     let buf = singleton!(: [u8; 8] = [0; 8]).unwrap();

diff --git a/examples/serial-dma-rx.rs b/examples/serial-dma-rx.rs
@@ -25,7 +25,7 @@ fn main() -> ! {
 
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
-    let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain();
     let channels = p.DMA1.split();
 
     let mut gpioa = p.GPIOA.split();
@@ -49,7 +49,7 @@ fn main() -> ! {
 
     let serial = Serial::new(
         p.USART1,
-        (tx, rx, &mut afio.mapr),
+        (tx, rx),
         Config::default().baudrate(9_600.bps()),
         &clocks,
     );

diff --git a/examples/serial-dma-tx.rs b/examples/serial-dma-tx.rs
@@ -25,7 +25,7 @@ fn main() -> ! {
 
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
-    let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain();
     let channels = p.DMA1.split();
 
     let mut gpioa = p.GPIOA.split();
@@ -49,7 +49,7 @@ fn main() -> ! {
 
     let serial = Serial::new(
         p.USART1,
-        (tx, rx, &mut afio.mapr),
+        (tx, rx),
         Config::default().baudrate(9600.bps()),
         &clocks,
     );

diff --git a/examples/serial-fmt.rs b/examples/serial-fmt.rs
@@ -34,7 +34,7 @@ fn main() -> ! {
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
     // Prepare the alternate function I/O registers
-    let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain();
 
     // Prepare the GPIOB peripheral
     let mut gpiob = p.GPIOB.split();
@@ -61,7 +61,7 @@ fn main() -> ! {
     // the registers are used to enable and configure the device.
     let serial = Serial::new(
         p.USART3,
-        (tx, rx, &mut afio.mapr),
+        (tx, rx),
         Config::default().baudrate(9600.bps()),
         &clocks,
     );

diff --git a/examples/serial-interrupt-idle.rs b/examples/serial-interrupt-idle.rs
@@ -9,11 +9,9 @@
 
 use cortex_m_rt::entry;
 use stm32f1xx_hal::{
-    pac,
-    pac::interrupt,
-    pac::USART1,
+    pac::{self, interrupt, USART1},
     prelude::*,
-    serial::{Rx, Serial, Tx},
+    serial::{Rx, Tx},
 };
 
 static mut RX: Option<Rx<USART1>> = None;
@@ -44,15 +42,18 @@
 
     // Set up the usart device. Takes ownership over the USART register and tx/rx pins. The rest of
     // the registers are used to enable and configure the device.
-    let (mut tx, mut rx) =
-        Serial::new(p.USART1, (tx, rx, &mut afio.mapr), 115_200.bps(), &clocks).split();
+    let (mut tx, mut rx) = p
+        .USART1
+        .remap(&mut afio.mapr)
+        .serial((tx, rx), 115_200.bps(), &clocks)
+        .split();
     tx.listen();
     rx.listen();
     rx.listen_idle();

    cortex_m::interrupt::free(|_| unsafe {
        TX.replace(tx);
        RX.replace(rx);
    });
    unsafe {
        cortex_m::peripheral::NVIC::unmask(pac::Interrupt::USART1);
@@ -67,7 +68,7 @@
 static mut WIDX: usize = 0;

 unsafe fn write(buf: &[u8]) {
    if let Some(tx) = TX.as_mut() {
        buf.iter()
            .for_each(|w| if let Err(_err) = nb::block!(tx.write(*w)) {})
    }
@@ -75,7 +76,7 @@
 #[interrupt]
 unsafe fn USART1() {
    cortex_m::interrupt::free(|_| {
        if let Some(rx) = RX.as_mut() {
            if rx.is_rx_not_empty() {
                if let Ok(w) = nb::block!(rx.read()) {
                    BUFFER[WIDX] = w;

diff --git a/examples/serial.rs b/examples/serial.rs
@@ -31,7 +31,7 @@ fn main() -> ! {
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
     // Prepare the alternate function I/O registers
-    let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain();
 
     // Prepare the GPIOB peripheral
     let mut gpiob = p.GPIOB.split();
@@ -56,11 +56,9 @@ fn main() -> ! {
 
     // Set up the usart device. Take ownership over the USART register and tx/rx pins. The rest of
     // the registers are used to enable and configure the device.
-    let mut serial = p.USART3.serial(
-        (tx, rx, &mut afio.mapr),
-        Config::default().baudrate(9600.bps()),
-        &clocks,
-    );
+    let mut serial = p
+        .USART3
+        .serial((tx, rx), Config::default().baudrate(115200.bps()), &clocks);
 
     // Loopback test. Write `X` and wait until the write is successful.
     let sent = b'X';
@@ -77,10 +75,10 @@ fn main() -> ! {
 
     // You can also split the serial struct into a receiving and a transmitting part
     let (mut tx, mut rx) = serial.split();
-    let sent = b'Y';
-    block!(tx.write_u8(sent)).unwrap();
     let received = block!(rx.read()).unwrap();
-    assert_eq!(received, sent);
+    //let sent = b'Y';
+    block!(tx.write_u8(received)).unwrap();
+    //assert_eq!(received, sent);
     asm::bkpt();
 
     loop {}

diff --git a/examples/serial_9bits.rs b/examples/serial_9bits.rs
@@ -13,6 +13,7 @@ use cortex_m_rt::entry;
 use nb::block;
 use panic_halt as _;
 use stm32f1xx_hal::{
+    gpio::PushPull,
     pac,
     prelude::*,
     serial::{self, Config, Error},
@@ -108,7 +109,7 @@ fn main() -> ! {
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
     // Prepare the alternate function I/O registers.
-    let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain();
 
     // Prepare the GPIOB peripheral.
     let gpiob = p.GPIOB.split();
@@ -119,10 +120,10 @@ fn main() -> ! {
     // Set up the usart device. Take ownership over the USART register and tx/rx pins. The rest of
     // the registers are used to enable and configure the device.
     //
-    //let serial = Serial::<_, PushPull, Floating>::new(p.USART3,
+    //let serial = Serial::<_, PushPull, _>::new(p.USART3,
     // or shorter
-    let serial = p.USART3.serial(
-        (tx_pin, rx_pin, &mut afio.mapr),
+    let serial = p.USART3.serial::<PushPull, _>(
+        (tx_pin, rx_pin),
         Config::default()
             .baudrate(9600.bps())
             .wordlength_9bits()

diff --git a/examples/serial_config.rs b/examples/serial_config.rs
@@ -31,7 +31,7 @@ fn main() -> ! {
     let clocks = rcc.cfgr.freeze(&mut flash.acr);
 
     // Prepare the alternate function I/O registers
-    let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain();
 
     // Prepare the GPIOB peripheral
     let mut gpiob = p.GPIOB.split();
@@ -53,7 +53,7 @@ fn main() -> ! {
     // the registers are used to enable and configure the device.
     let mut tx = Serial::tx(
         p.USART3,
-        (tx, &mut afio.mapr),
+        tx,
         serial::Config::default()
             .baudrate(9600.bps())
             .stopbits(serial::StopBits::STOP2)