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1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

### Changed

- Fix CAN2 remap
- `Adc::new` instead of `Adc::adcX` and `AdcExt` trait
- Update `bxcan`, `heapless`, `mfrc522`, reenable `mpu9250` example [#513]
- PWM timer auto reload value is now preloaded/buffered [#453]
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6 changes: 5 additions & 1 deletion examples/can-echo.rs
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Expand Up @@ -46,8 +46,12 @@ fn main() -> ! {

#[cfg(feature = "connectivity")]
let _can2 = {
let mut afio = dp.AFIO.constrain(&mut rcc);
let gpiob = dp.GPIOB.split(&mut rcc);
let can = dp.CAN2.can((gpiob.pb6, gpiob.pb5), &mut rcc);
let can = dp
.CAN2
.remap(&mut afio.mapr)
.can((gpiob.pb6, gpiob.pb5), &mut rcc);

// APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
// Value was calculated with http://www.bittiming.can-wiki.info/
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2 changes: 1 addition & 1 deletion examples/serial-dma-circ.rs
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Expand Up @@ -23,7 +23,7 @@ fn main() -> ! {

let mut rcc = p.RCC.constrain();

//let mut afio = p.AFIO.constrain();
//let mut afio = p.AFIO.constrain(&mut rcc);
let channels = p.DMA1.split(&mut rcc);

let mut gpioa = p.GPIOA.split(&mut rcc);
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2 changes: 1 addition & 1 deletion examples/serial-dma-peek.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ fn main() -> ! {

let mut rcc = p.RCC.constrain();

//let mut afio = p.AFIO.constrain();
//let mut afio = p.AFIO.constrain(&mut rcc);
let channels = p.DMA1.split(&mut rcc);

let mut gpioa = p.GPIOA.split(&mut rcc);
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2 changes: 1 addition & 1 deletion examples/serial-fmt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ fn main() -> ! {
let mut rcc = p.RCC.constrain();

// Prepare the alternate function I/O registers
//let mut afio = p.AFIO.constrain();
//let mut afio = p.AFIO.constrain(&mut rcc);

// Prepare the GPIOB peripheral
let mut gpiob = p.GPIOB.split(&mut rcc);
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2 changes: 1 addition & 1 deletion examples/serial_9bits.rs
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Expand Up @@ -102,7 +102,7 @@ fn main() -> ! {
let mut rcc = p.RCC.constrain();

// Prepare the alternate function I/O registers.
//let mut afio = p.AFIO.constrain();
//let mut afio = p.AFIO.constrain(&mut rcc);

// Prepare the GPIOB peripheral.
let gpiob = p.GPIOB.split(&mut rcc);
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2 changes: 1 addition & 1 deletion examples/serial_config.rs
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ fn main() -> ! {
let mut rcc = p.RCC.constrain();

// Prepare the alternate function I/O registers
//let mut afio = p.AFIO.constrain();
//let mut afio = p.AFIO.constrain(&mut rcc);

// Prepare the GPIOB peripheral
let mut gpiob = p.GPIOB.split(&mut rcc);
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2 changes: 1 addition & 1 deletion examples/serial_reconfigure.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ fn main() -> ! {
let mut rcc = p.RCC.constrain();

// Prepare the alternate function I/O registers
//let mut afio = p.AFIO.constrain();
//let mut afio = p.AFIO.constrain(&mut rcc);

// Prepare the GPIOB peripheral
let mut gpiob = p.GPIOB.split(&mut rcc);
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2 changes: 1 addition & 1 deletion examples/spi.rs
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Expand Up @@ -23,7 +23,7 @@ fn setup() -> (Spi<SPI1, u8>, PA4<Output>) {

let mut rcc = dp.RCC.constrain();

//let mut afio = dp.AFIO.constrain();
//let mut afio = dp.AFIO.constrain(&mut rcc);
let mut gpioa = dp.GPIOA.split(&mut rcc);

// SPI1
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12 changes: 6 additions & 6 deletions src/afio.rs
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ impl AfioExt for AFIO {
/// ```rust
/// let p = pac::Peripherals::take().unwrap();
/// let mut rcc = p.RCC.constrain();
/// let mut afio = p.AFIO.constrain();
/// let mut afio = p.AFIO.constrain(&mut rcc);
pub struct Parts {
pub evcr: EVCR,
pub mapr: MAPR,
Expand All @@ -62,7 +62,7 @@ impl EVCR {
/// ```rust
/// let dp = pac::Peripherals::take().unwrap();
/// let mut rcc = dp.RCC.constrain();
/// let mut afio = dp.AFIO.constrain();
/// let mut afio = dp.AFIO.constrain(&mut rcc);
/// function_using_mapr(&mut afio.mapr);
/// ```
#[non_exhaustive]
Expand Down Expand Up @@ -318,14 +318,14 @@ pub mod can2 {

pin! {
<Tx, Alternate<PushPull>> for [
PB6: [0],
PB13: [1],
PB13: [0],
PB6: [1],
],
}
pin! {
<Rx, Input> default:Floating for [
PB5: [0],
PB12: [1],
PB12: [0],
PB5: [1],
],
}

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2 changes: 1 addition & 1 deletion src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,7 @@
//! let clocks = rcc.cfgr.freeze(&mut flash.acr);
//!
//! // Prepare the alternate function I/O registers
//! let mut afio = dp.AFIO.constrain();
//! let mut afio = dp.AFIO.constrain(&mut rcc);
//! ```
//!
//! ## Usage examples
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4 changes: 2 additions & 2 deletions src/serial.rs
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Expand Up @@ -55,8 +55,8 @@
//! let mut flash = dp.FLASH.constrain();
//! let mut rcc = dp.RCC.constrain();
//! let clocks = rcc.cfgr.freeze(&mut flash.acr);
//! let mut afio = dp.AFIO.constrain();
//! let mut gpioa = dp.GPIOA.split();
//! let mut afio = dp.AFIO.constrain(&mut rcc);
//! let mut gpioa = dp.GPIOA.split(&mut rcc);
//!
//! // USART1 on Pins A9 and A10
//! let pin_tx = gpioa.pa9.into_alternate_push_pull(&mut gpioa.crh);
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