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Use intra-doc links and extend documentation
This makes use of the newly (since 1.48) available intra-doc-links feature. (see https://doc.rust-lang.org/stable/rustdoc/linking-to-items-by-name.html) Also build the documentation for the `can` module and add usage example for the `rcc` module.
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6 files changed

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Cargo.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ exclude = [
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]
2020

2121
[package.metadata.docs.rs]
22-
features = ["stm32f303xc", "rt", "stm32-usbd"]
22+
features = ["stm32f303xc", "rt", "stm32-usbd", "can"]
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targets = ["thumbv7em-none-eabihf"]
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[dependencies]

src/can.rs

Lines changed: 28 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,11 @@
11
//! Controller Area Network
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//!
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//! CAN is currently not enabled by default, and
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//! can be enabled by the `can` feature.
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//!
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//! It is a implementation of the [`embedded_hal_can`][can] traits.
7+
//!
8+
//! [can]: embedded_hal_can
29
pub use embedded_hal_can::{self, Filter, Frame, Id, Receiver, Transmitter};
310

411
use crate::gpio::gpioa;
@@ -13,7 +20,8 @@ use core::sync::atomic::{AtomicU8, Ordering};
1320
const EXID_MASK: u32 = 0b11111_11111100_00000000_00000000;
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const MAX_EXTENDED_ID: u32 = 0x1FFF_FFFF;
1522

16-
/// A CAN identifier, which can be either 11 or 27 (extended) bits. u16 and u32 respectively are used here despite the fact that the upper bits are unused.
23+
/// A CAN identifier, which can be either 11 or 27 (extended) bits.
24+
/// u16 and u32 respectively are used here despite the fact that the upper bits are unused.
1725
#[derive(Debug, Copy, Clone, Eq, PartialEq)]
1826
pub enum CanId {
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BaseId(u16),
@@ -22,14 +30,16 @@ pub enum CanId {
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2331
/// A CAN frame consisting of a destination ID and up to 8 bytes of data.
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///
25-
/// Currently, we always allocate a fixed size array for each frame regardless of actual size, but this could be improved in the future using const-generics.
33+
/// Currently, we always allocate a fixed size array for each frame regardless
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/// of actual size, but this could be improved in the future using const-generics.
2635
#[derive(Debug, Clone, Eq, PartialEq)]
2736
pub struct CanFrame {
2837
pub id: CanId,
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pub data: Vec<u8, U8>,
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}
3140

32-
/// Represents the operating mode of a CAN filter, which can either contain a list of identifiers, or a mask to match on.
41+
/// Represents the operating mode of a CAN filter, which can either contain a
42+
/// list of identifiers, or a mask to match on.
3343
pub enum FilterMode {
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Mask,
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List,
@@ -58,7 +68,8 @@ pub struct Can {
5868
_tx: gpioa::PA12<AF9>,
5969
}
6070

61-
/// A CAN FIFO which is used to receive and buffer messages from the CAN network that match on of the assigned filters.
71+
/// A CAN FIFO which is used to receive and buffer messages from the CAN
72+
/// network that match on of the assigned filters.
6273
pub struct CanFifo {
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idx: usize,
6475
}
@@ -140,9 +151,12 @@ impl embedded_hal_can::Filter for CanFilter {
140151
CanFilter::new(CanFilterData::AcceptAll)
141152
}
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143-
// TODO: Constructing filters like this is fairly limiting because ideally we would have the full "filter state" available, so for non-extended filters this could be 2 masks and filters or 4 ids for id lists
154+
// TODO: Constructing filters like this is fairly limiting because ideally
155+
// we would have the full "filter state" available, so for non-extended
156+
// filters this could be 2 masks and filters or 4 ids for id lists
144157

145-
/// Constuct a mask filter. This method accepts two parameters, the mask which designates which bits are actually matched againts and the filter, with the actual bits to match.
158+
/// Constuct a mask filter. This method accepts two parameters, the mask which designates which
159+
/// bits are actually matched againts and the filter, with the actual bits to match.
146160
fn from_mask(mask: u32, filter: u32) -> Self {
147161
assert!(
148162
mask < MAX_EXTENDED_ID,
@@ -159,7 +173,8 @@ impl embedded_hal_can::Filter for CanFilter {
159173
}
160174

161175
impl CanFilter {
162-
/// Create a new filter with no assigned index. To actually active the filter call `Receiver::set_filter`, which will assign an index.
176+
/// Create a new filter with no assigned index. To actually active the filter call
177+
/// [`Receiver::set_filter`], which will assign an index.
163178
pub fn new(data: CanFilterData) -> CanFilter {
164179
CanFilter { data, index: None }
165180
}
@@ -179,7 +194,8 @@ impl CanFilterData {
179194
CanFilterData::AcceptAll => 0,
180195
CanFilterData::ExtendedMaskFilter(filter, _) => filter << 3,
181196
CanFilterData::MaskFilter(filter, mask) => {
182-
let shifted_filter = ((*filter as u32) << 5) & (u16::max_value() as u32); // Only use lower 16 bits
197+
// Only use lower 16 bits
198+
let shifted_filter = ((*filter as u32) << 5) & (u16::max_value() as u32);
183199
let shifted_mask = ((*mask as u32) << 5) << 16;
184200

185201
shifted_filter | shifted_mask
@@ -195,8 +211,10 @@ impl CanFilterData {
195211
match self {
196212
CanFilterData::AcceptAll => Some(0),
197213
CanFilterData::ExtendedMaskFilter(_, mask) => Some(mask << 3),
198-
CanFilterData::MaskFilter(_, _mask) => None, // TODO: We should be able to fill this register with a second filter/mask pair
199-
CanFilterData::IdFilter(_id) => None, // TODO: This sucks, we need more info here to figure out the correct value of fr2
214+
// TODO: We should be able to fill this register with a second filter/mask pair
215+
CanFilterData::MaskFilter(_, _mask) => None,
216+
// TODO: This sucks, we need more info here to figure out the correct value of fr2
217+
CanFilterData::IdFilter(_id) => None,
200218
}
201219
}
202220
}

src/gpio.rs

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
//! General Purpose Input / Output
22
//!
33
//! To use the GPIO pins, you first need to configure the GPIO bank (GPIOA, GPIOB, ...) that you
4-
//! are interested in. This is done using the [GpioExt::split](trait.GpioExt.html#tymethod.split) function.
4+
//! are interested in. This is done using the [`GpioExt::split`] function.
55
//!
66
//! ```
77
//! let dp = pac::Peripherals::take().unwrap();
@@ -10,10 +10,10 @@
1010
//! let mut gpioa = dp.GPIOA.split(&mut rcc.ahb);
1111
//! ```
1212
//!
13-
//! The resulting [Parts](gpioa/struct.Parts.html) struct contains one field for each
13+
//! The resulting [Parts](gpioa::Parts) struct contains one field for each
1414
//! pin, as well as some shared registers.
1515
//!
16-
//! To use a pin, first use the relevant `into_...` method of the [pin](gpioa/struct.PA0.html).
16+
//! To use a pin, first use the relevant `into_...` method of the [pin](gpioa::PA0).
1717
//!
1818
//! ```rust
1919
//! let pa0 = gpioa.pa0.into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper);
@@ -24,8 +24,8 @@
2424
//!
2525
//! For a complete example, see [examples/toggle.rs]
2626
//!
27-
//! [InputPin]: ../prelude/trait._embedded_hal_digital_InputPin.html
28-
//! [OutputPin]: ../prelude/trait._embedded_hal_digital_OutputPin.html
27+
//! [InputPin]: embedded_hal::digital::v2::InputPin
28+
//! [OutputPin]: embedded_hal::digital::v2::OutputPin
2929
//! [examples/toggle.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.4.3/examples/toggle.rs
3030
3131
use core::convert::Infallible;
@@ -43,7 +43,7 @@ use crate::rcc::AHB;
4343

4444
/// Extension trait to split a GPIO peripheral in independent pins and registers
4545
pub trait GpioExt {
46-
/// The to split the GPIO into
46+
/// The Parts to split the GPIO peripheral into
4747
type Parts;
4848

4949
/// Splits the GPIO block into independent pins and registers

src/lib.rs

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,13 @@
11
/*!
2+
# stm32f3xx-hal
3+
4+
`stm32f3xx-hal` contains a multi device hardware abstraction on top of the
5+
peripheral access API for the STMicro [STM32F3][stm] series microcontrollers. The
6+
selection of the MCU is done by [feature][f] gates
7+
8+
[f]: #selecting-the-right-chip
9+
[stm]: https://www.st.com/en/microcontrollers-microprocessors/stm32f3-series.html
10+
211
# Selecting the right chip
312
413
This crate requires you to specify your target chip as a feature.
@@ -87,25 +96,32 @@ pub use nb;
8796
pub use nb::block;
8897

8998
#[cfg(any(feature = "stm32f301", feature = "stm32f318"))]
99+
/// Peripheral access
90100
pub use stm32f3::stm32f301 as pac;
91101

92102
#[cfg(feature = "stm32f302")]
103+
/// Peripheral access
93104
pub use stm32f3::stm32f302 as pac;
94105

95106
#[cfg(feature = "stm32f303")]
107+
/// Peripheral access
96108
pub use stm32f3::stm32f303 as pac;
97109

98110
#[cfg(any(feature = "stm32f373", feature = "stm32f378"))]
111+
/// Peripheral access
99112
pub use stm32f3::stm32f373 as pac;
100113

101114
#[cfg(feature = "stm32f334")]
115+
/// Peripheral access
102116
pub use stm32f3::stm32f3x4 as pac;
103117

104118
#[cfg(any(feature = "stm32f328", feature = "stm32f358", feature = "stm32f398"))]
119+
/// Peripheral access
105120
pub use stm32f3::stm32f3x8 as pac;
106121

107122
#[cfg(feature = "device-selected")]
108123
#[deprecated(since = "0.5.0", note = "please use `pac` instead")]
124+
/// Peripheral access
109125
pub use crate::pac as stm32;
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111127
// Enable use of interrupt macro

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