Add unsafe peripheral function

to mutate underlying peripheral

Author: Sh3Rm4n

CHANGELOG.md

@@ -64,6 +64,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Add `use_pll` to `CFGR` - the clock configuration - to force to use the PLL
   source for the systemclock. Also `Clocks::pllclk()` was introduced to be able
   to check, whether PLL is used.
+- Add unsafe peripheral function to access underlying peripheral ([#277])
 
 [`enumset`]: https://crates.io/crates/enumset
 
@@ -143,6 +144,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
   - A generic `Instance` trait now represents all Spi peripherals.
   - `Spi::spi1` and so on are renamed to `Spi::new`.
   - Add SPI configuration type to be passed into `Spi::new`
+- Remove public fields from `Adc` and `Rtc` ([#277])
 
 ## [v0.7.0] - 2021-06-18
 
@@ -468,6 +470,7 @@ let clocks = rcc
 [defmt]: https://github.com/knurling-rs/defmt
 [filter]: https://defmt.ferrous-systems.com/filtering.html
 
+[#277]: https://github.com/stm32-rs/stm32f3xx-hal/pull/277
 [#273]: https://github.com/stm32-rs/stm32f3xx-hal/pull/273
 [#271]: https://github.com/stm32-rs/stm32f3xx-hal/pull/271
 [#270]: https://github.com/stm32-rs/stm32f3xx-hal/pull/270

src/adc.rs

@@ -510,6 +510,19 @@ macro_rules! adc_hal {
                     };
                 }
 
+                /// Get access to the underlying register block.
+                ///
+                /// # Safety
+                ///
+                /// This function is not _memory_ unsafe per se, but does not guarantee
+                /// anything about assumptions of invariants made in this implementation.
+                ///
+                /// Changing specific options can lead to un-expected behavior and nothing
+                /// is guaranteed.
+                pub unsafe fn peripheral(&mut self) -> &mut $ADC {
+                    &mut self.adc
+                }
+
             }
 
             impl<Word, Pin> OneShot<$ADC, Word, Pin> for Adc<$ADC>

src/delay.rs

@@ -55,6 +55,19 @@ impl Delay {
         Delay { clocks, syst }
     }
 
+    /// Get access to the underlying register block.
+    ///
+    /// # Safety
+    ///
+    /// This function is not _memory_ unsafe per se, but does not guarantee
+    /// anything about assumptions of invariants made in this implementation.
+    ///
+    /// Changing specific options can lead to un-expected behavior and nothing
+    /// is guaranteed.
+    pub unsafe fn peripheral(&mut self) -> &mut SYST {
+        &mut self.syst
+    }
+
     /// Releases the system timer (SysTick) resource
     pub fn free(self) -> SYST {
         self.syst

src/i2c.rs

@@ -195,6 +195,19 @@ impl<I2C, SCL, SDA> I2c<I2C, (SCL, SDA)> {
         Self { i2c, pins }
     }
 
+    /// Get access to the underlying register block.
+    ///
+    /// # Safety
+    ///
+    /// This function is not _memory_ unsafe per se, but does not guarantee
+    /// anything about assumptions of invariants made in this implementation.
+    ///
+    /// Changing specific options can lead to un-expected behavior and nothing
+    /// is guaranteed.
+    pub unsafe fn peripheral(&mut self) -> &mut I2C {
+        &mut self.i2c
+    }
+
     /// Releases the I2C peripheral and associated pins
     pub fn free(self) -> (I2C, (SCL, SDA)) {
         (self.i2c, self.pins)

src/rtc.rs

@@ -84,6 +84,19 @@ impl Rtc {
         self.rtc.cr.read().fmt().bit()
     }
 
+    /// Get access to the underlying register block.
+    ///
+    /// # Safety
+    ///
+    /// This function is not _memory_ unsafe per se, but does not guarantee
+    /// anything about assumptions of invariants made in this implementation.
+    ///
+    /// Changing specific options can lead to un-expected behavior and nothing
+    /// is guaranteed.
+    pub unsafe fn peripheral(&mut self) -> &mut RTC {
+        &mut self.rtc
+    }
+
     /// Release the RTC peripheral
     pub fn free(self) -> RTC {
         // TODO(Sh3Rm4n): Disable peripheral before releasing it.

src/serial.rs

@@ -511,6 +511,19 @@ where
         Self { usart, pins }
     }
 
+    /// Get access to the underlying register block.
+    ///
+    /// # Safety
+    ///
+    /// This function is not _memory_ unsafe per se, but does not guarantee
+    /// anything about assumptions of invariants made in this implementation.
+    ///
+    /// Changing specific options can lead to un-expected behavior and nothing
+    /// is guaranteed.
+    pub unsafe fn peripheral(&mut self) -> &mut Usart {
+        &mut self.usart
+    }
+
     /// Releases the USART peripheral and associated pins
     pub fn free(self) -> (Usart, (Tx, Rx)) {
         self.usart

src/spi.rs

@@ -270,6 +270,19 @@ impl<SPI, Sck, Miso, Mosi, WORD> Spi<SPI, (Sck, Miso, Mosi), WORD> {
         }
     }
 
+    /// Get access to the underlying register block.
+    ///
+    /// # Safety
+    ///
+    /// This function is not _memory_ unsafe per se, but does not guarantee
+    /// anything about assumptions of invariants made in this implementation.
+    ///
+    /// Changing specific options can lead to un-expected behavior and nothing
+    /// is guaranteed.
+    pub unsafe fn peripheral(&mut self) -> &mut SPI {
+        &mut self.spi
+    }
+
     /// Releases the SPI peripheral and associated pins
     pub fn free(self) -> (SPI, (Sck, Miso, Mosi)) {
         (self.spi, self.pins)

src/timer.rs

@@ -212,6 +212,19 @@ where
         self.tim.clear_sr();
     }
 
+    /// Get access to the underlying register block.
+    ///
+    /// # Safety
+    ///
+    /// This function is not _memory_ unsafe per se, but does not guarantee
+    /// anything about assumptions of invariants made in this implementation.
+    ///
+    /// Changing specific options can lead to un-expected behavior and nothing
+    /// is guaranteed.
+    pub unsafe fn peripheral(&mut self) -> &mut TIM {
+        &mut self.tim
+    }
+
     /// Releases the TIM peripheral
     #[inline]
     pub fn free(mut self) -> TIM {

src/watchdog.rs

@@ -106,6 +106,19 @@ impl IndependentWatchDog {
         // pub fn free(self) -> IWDG {}
     }
 
+    /// Get access to the underlying register block.
+    ///
+    /// # Safety
+    ///
+    /// This function is not _memory_ unsafe per se, but does not guarantee
+    /// anything about assumptions of invariants made in this implementation.
+    ///
+    /// Changing specific options can lead to un-expected behavior and nothing
+    /// is guaranteed.
+    pub unsafe fn peripheral(&mut self) -> &mut IWDG {
+        &mut self.iwdg
+    }
+
     /// Returns the currently set interval
     pub fn interval(&self) -> Milliseconds {
         // If the prescaler was changed wait until the change procedure is finished.