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1 change: 1 addition & 0 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,7 @@ nb = "0.1"
paste = "1"
rtcc = "0.2"
stm32f3 = "0.12"
embedded-time = "0.10"

[dependencies.embedded-hal-can]
version = "0.1.0"
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15 changes: 10 additions & 5 deletions examples/can.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ use cortex_m_rt::entry;

use hal::prelude::*;
use hal::stm32;
use hal::time::{duration::*, rate::*};
use hal::watchdog::IndependentWatchDog;

use hal::can::{Can, CanFilter, CanFrame, CanId, Filter, Frame, Receiver, Transmitter};
Expand All @@ -31,10 +32,14 @@ fn main() -> ! {

let _clocks = rcc
.cfgr
.use_hse(32.mhz())
.sysclk(32.mhz())
.pclk1(16.mhz())
.pclk2(16.mhz())
.use_hse(32u32.MHz())
.unwrap()
.sysclk(32u32.MHz())
.unwrap()
.pclk1(16u32.MHz())
.unwrap()
.pclk2(16u32.MHz())
.unwrap()
.freeze(&mut flash.acr);

// Configure CAN RX and TX pins (AF9)
Expand All @@ -60,7 +65,7 @@ fn main() -> ! {
// Watchdog makes sure this gets restarted periodically if nothing happens
let mut iwdg = IndependentWatchDog::new(dp.IWDG);
iwdg.stop_on_debug(&dp.DBGMCU, true);
iwdg.start(100.ms());
iwdg.start(100u32.milliseconds());

// Send an initial message!
asm::delay(100_000);
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4 changes: 3 additions & 1 deletion examples/i2c_scanner.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@ use cortex_m::asm;
use cortex_m_rt::entry;
use cortex_m_semihosting::{hprint, hprintln};

use hal::time::rate::*;
use stm32f3xx_hal::{self as hal, pac, prelude::*};

const VALID_ADDR_RANGE: Range<u8> = 0x08..0x78;
Expand All @@ -33,7 +34,8 @@ fn main() -> ! {
gpiob.pb6.into_af4(&mut gpiob.moder, &mut gpiob.afrl), // SCL
gpiob.pb7.into_af4(&mut gpiob.moder, &mut gpiob.afrl), // SDA
);
let mut i2c = hal::i2c::I2c::new(dp.I2C1, pins, 100.khz(), clocks, &mut rcc.apb1);

let mut i2c = hal::i2c::I2c::new(dp.I2C1, pins, 100u32.kHz(), clocks, &mut rcc.apb1).unwrap();

hprintln!("Start i2c scanning...").expect("Error using hprintln.");
hprintln!().unwrap();
Expand Down
28 changes: 14 additions & 14 deletions examples/pwm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ use hal::gpio::GpioExt;
use hal::pac;
use hal::pwm::{tim16, tim2, tim3, tim8};
use hal::rcc::RccExt;
use hal::time::U32Ext;
use hal::time::rate::*;

#[entry]
fn main() -> ! {
Expand All @@ -28,7 +28,7 @@ fn main() -> ! {
// Configure our clocks
let mut flash = dp.FLASH.constrain();
let mut rcc = dp.RCC.constrain();
let clocks = rcc.cfgr.sysclk(16.mhz()).freeze(&mut flash.acr);
let clocks = rcc.cfgr.sysclk(16u32.MHz()).unwrap().freeze(&mut flash.acr);

// Prep the pins we need in their correct alternate function
let mut gpioa = dp.GPIOA.split(&mut rcc.ahb);
Expand All @@ -52,9 +52,9 @@ fn main() -> ! {
// A four channel general purpose timer that's broadly available
let tim3_channels = tim3(
dp.TIM3,
1280, // resolution of duty cycle
50.hz(), // frequency of period
&clocks, // To get the timer's clock speed
1280, // resolution of duty cycle
50u32.Hz(), // frequency of period
&clocks, // To get the timer's clock speed
);

// Channels without pins cannot be enabled, so we can't forget to
Expand Down Expand Up @@ -101,9 +101,9 @@ fn main() -> ! {
// A 32-bit timer, so we can set a larger resolution
let tim2_channels = tim2(
dp.TIM2,
160000, // resolution of duty cycle
50.hz(), // frequency of period
&clocks, // To get the timer's clock speed
160000, // resolution of duty cycle
50u32.Hz(), // frequency of period
&clocks, // To get the timer's clock speed
);

let mut tim2_ch3 = tim2_channels.2.output_to_pb10(pb10);
Expand All @@ -116,9 +116,9 @@ fn main() -> ! {
// just use it directly
let mut tim16_ch1 = tim16(
dp.TIM16,
1280, // resolution of duty cycle
50.hz(), // frequency of period
&clocks, // To get the timer's clock speed
1280, // resolution of duty cycle
50u32.Hz(), // frequency of period
&clocks, // To get the timer's clock speed
)
.output_to_pb8(pb8);
tim16_ch1.set_duty(tim16_ch1.get_max_duty() / 20); // 5% duty cyle
Expand All @@ -130,9 +130,9 @@ fn main() -> ! {
// to complementary pins (works just like standard pins)
let tim8_channels = tim8(
dp.TIM8,
1280, // resolution of duty cycle
50.hz(), // frequency of period
&clocks, // To get the timer's clock speed
1280, // resolution of duty cycle
50u32.Hz(), // frequency of period
&clocks, // To get the timer's clock speed
);

let mut tim8_ch1 = tim8_channels.0.output_to_pc10(pc10);
Expand Down
4 changes: 2 additions & 2 deletions examples/serial_dma.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ use panic_semihosting as _;

use cortex_m::{asm, singleton};
use cortex_m_rt::entry;
use stm32f3xx_hal::{pac, prelude::*, serial::Serial};
use stm32f3xx_hal::{pac, prelude::*, serial::Serial, time::rate::*};

#[entry]
fn main() -> ! {
Expand All @@ -25,7 +25,7 @@ fn main() -> ! {
gpioa.pa9.into_af7(&mut gpioa.moder, &mut gpioa.afrh),
gpioa.pa10.into_af7(&mut gpioa.moder, &mut gpioa.afrh),
);
let serial = Serial::usart1(dp.USART1, pins, 9600.bps(), clocks, &mut rcc.apb2);
let serial = Serial::usart1(dp.USART1, pins, 9600.Bd(), clocks, &mut rcc.apb2);
let (tx, rx) = serial.split();

let dma1 = dp.DMA1.split(&mut rcc.ahb);
Expand Down
15 changes: 10 additions & 5 deletions examples/spi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@ use cortex_m_rt::entry;
use hal::pac;
use hal::prelude::*;
use hal::spi::{Mode, Phase, Polarity, Spi};
use hal::time::rate::*;

#[entry]
fn main() -> ! {
Expand All @@ -24,9 +25,12 @@ fn main() -> ! {

let clocks = rcc
.cfgr
.use_hse(8.mhz())
.sysclk(48.mhz())
.pclk1(24.mhz())
.use_hse(8u32.MHz())
.unwrap()
.sysclk(48u32.MHz())
.unwrap()
.pclk1(24u32.MHz())
.unwrap()
.freeze(&mut flash.acr);

// Configure pins for SPI
Expand All @@ -43,10 +47,11 @@ fn main() -> ! {
dp.SPI1,
(sck, miso, mosi),
spi_mode,
3.mhz(),
3u32.MHz(),
clocks,
&mut rcc.apb2,
);
)
.unwrap();

// Create an `u8` array, which can be transfered via SPI.
let msg_send: [u8; 8] = [0xD, 0xE, 0xA, 0xD, 0xB, 0xE, 0xE, 0xF];
Expand Down
13 changes: 9 additions & 4 deletions examples/usb_serial.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@ use cortex_m_rt::entry;

use hal::pac;
use hal::prelude::*;
use hal::time::rate::*;
use hal::usb::{Peripheral, UsbBus};

use usb_device::prelude::*;
Expand All @@ -26,10 +27,14 @@ fn main() -> ! {

let clocks = rcc
.cfgr
.use_hse(8.mhz())
.sysclk(48.mhz())
.pclk1(24.mhz())
.pclk2(24.mhz())
.use_hse(8u32.MHz())
.unwrap()
.sysclk(48u32.MHz())
.unwrap()
.pclk1(24u32.MHz())
.unwrap()
.pclk2(24u32.MHz())
.unwrap()
.freeze(&mut flash.acr);

assert!(clocks.usbclk_valid());
Expand Down
20 changes: 13 additions & 7 deletions src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,15 +4,15 @@
//!
//! [examples/i2c_scanner.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.0/examples/i2c_scanner.rs

use core::convert::TryFrom;
use core::convert::{TryFrom, TryInto};
use core::ops::Deref;

use crate::{
gpio::{gpioa, gpiob, AF4},
hal::blocking::i2c::{Read, Write, WriteRead},
pac::{i2c1::RegisterBlock, rcc::cfgr3::I2C1SW_A, I2C1, RCC},
rcc::{Clocks, APB1},
time::{Hertz, U32Ext},
time::rate::{Hertz, Rate},
};

#[cfg(not(feature = "gpio-f333"))]
Expand Down Expand Up @@ -111,14 +111,20 @@ macro_rules! busy_wait {

impl<I2C, SCL, SDA> I2c<I2C, (SCL, SDA)> {
/// Configures the I2C peripheral to work in master mode
pub fn new<F>(i2c: I2C, pins: (SCL, SDA), freq: F, clocks: Clocks, apb1: &mut APB1) -> Self
pub fn new<F>(
i2c: I2C,
pins: (SCL, SDA),
freq: F,
clocks: Clocks,
apb1: &mut APB1,
) -> Result<Self, <F as TryInto<Hertz<u32>>>::Error>
where
I2C: Instance,
SCL: SclPin<I2C>,
SDA: SdaPin<I2C>,
F: Into<Hertz>,
F: Rate + TryInto<Hertz<u32>>,
{
let freq = freq.into().0;
let freq = (freq.try_into()? as Hertz).0;

crate::assert!(freq <= 1_000_000);

Expand Down Expand Up @@ -195,7 +201,7 @@ impl<I2C, SCL, SDA> I2c<I2C, (SCL, SDA)> {
// Enable the peripheral
i2c.cr1.modify(|_, w| w.pe().set_bit());

Self { i2c, pins }
Ok(Self { i2c, pins })
}

/// Releases the I2C peripheral and associated pins
Expand Down Expand Up @@ -451,7 +457,7 @@ macro_rules! i2c {
fn clock(clocks: &Clocks) -> Hertz {
// NOTE(unsafe) atomic read with no side effects
match unsafe { (*RCC::ptr()).cfgr3.read().$i2cXsw().variant() } {
I2C1SW_A::HSI => 8.mhz().into(),
I2C1SW_A::HSI => Hertz(8_000_000),
I2C1SW_A::SYSCLK => clocks.sysclk(),
}
}
Expand Down
3 changes: 2 additions & 1 deletion src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -101,6 +101,8 @@ pub use embedded_hal as hal;
pub use nb;
pub use nb::block;

pub use embedded_time as time;

#[cfg(feature = "defmt")]
pub(crate) use defmt::{assert, panic, unreachable, unwrap};
#[cfg(feature = "defmt")]
Expand Down Expand Up @@ -187,7 +189,6 @@ cfg_if::cfg_if! {
pub mod rtc;
pub mod serial;
pub mod spi;
pub mod time;
pub mod timer;
}
}
Expand Down
1 change: 0 additions & 1 deletion src/prelude.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,6 @@ pub use crate::flash::FlashExt as _stm32f3xx_hal_flash_FlashExt;
pub use crate::gpio::GpioExt as _stm32f3xx_hal_gpio_GpioExt;
pub use crate::hal::prelude::*;
pub use crate::rcc::RccExt as _stm32f3xx_hal_rcc_RccExt;
pub use crate::time::U32Ext as _stm32f3xx_hal_time_U32Ext;
#[cfg(feature = "unproven")]
pub use crate::{
hal::digital::v2::InputPin as _embedded_hal_digital_InputPin,
Expand Down
2 changes: 1 addition & 1 deletion src/pwm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -160,7 +160,7 @@ use crate::{
hal::PwmPin,
pac::{RCC, TIM15, TIM16, TIM17, TIM2},
rcc::Clocks,
time::Hertz,
time::rate::Hertz,
};
use core::marker::PhantomData;

Expand Down
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