rcc::Enable and cleans

examples/can-echo.rs

@@ -6,7 +6,7 @@ use crate::hal::{
     gpio::{GpioExt as _, Speed},
     nb::block,
     pwr::PwrExt,
-    rcc::{Config, RccExt, SysClockSrc},
+    rcc::{Config, RccExt},
     stm32::Peripherals,
     time::RateExtU32,
 };
@@ -49,7 +49,7 @@ fn main() -> ! {
 
     let pwr = dp.PWR.constrain().freeze();
     let rcc = dp.RCC.constrain();
-    let mut rcc = rcc.freeze(Config::new(SysClockSrc::HSE(24.MHz())), pwr);
+    let mut rcc = rcc.freeze(Config::hse(24.MHz()), pwr);
 
     info!("Split GPIO");
 
@@ -61,7 +61,7 @@ fn main() -> ! {
         let tx = gpiob.pb9.into_alternate().speed(Speed::VeryHigh);
 
         info!("-- Create CAN 1 instance");
-        let mut can = dp.FDCAN1.fdcan(tx, rx, &rcc);
+        let mut can = dp.FDCAN1.fdcan(tx, rx, &mut rcc);
         can.set_protocol_exception_handling(false);
 
         info!("-- Configure nominal timing");

examples/i2c-mpu6050.rs

@@ -3,7 +3,6 @@
 #![no_main]
 #![no_std]
 
-use hal::i2c::Config;
 use hal::prelude::*;
 use hal::stm32;
 use hal::time::{ExtU32, RateExtU32};
@@ -29,7 +28,7 @@ fn main() -> ! {
     let sda = gpiob.pb9.into_alternate_open_drain();
     let scl = gpiob.pb8.into_alternate_open_drain();
 
-    let i2c = dp.I2C1.i2c(sda, scl, Config::new(100.kHz()), &mut rcc);
+    let i2c = dp.I2C1.i2c(sda, scl, 100.kHz(), &mut rcc);
 
     let mut mpu = Mpu6050::new(i2c);
     let mut delay = cp.SYST.delay(&rcc.clocks);

examples/i2c.rs

@@ -3,7 +3,6 @@
 #![no_main]
 #![no_std]
 
-use hal::i2c::Config;
 use hal::prelude::*;
 use hal::stm32;
 use hal::time::RateExtU32;
@@ -26,7 +25,7 @@ fn main() -> ! {
     let sda = gpiob.pb9.into_alternate_open_drain();
     let scl = gpiob.pb8.into_alternate_open_drain();
 
-    let mut i2c = dp.I2C1.i2c(sda, scl, Config::new(40.kHz()), &mut rcc);
+    let mut i2c = dp.I2C1.i2c(sda, scl, 40.kHz(), &mut rcc);
     // Alternatively, it is possible to specify the exact timing as follows (see the documentation
     // of with_timing() for an explanation of the constant):
     //let mut i2c = dp

src/adc/mod.rs

@@ -49,11 +49,8 @@ fn init_adc_common<ADCC: AdcCommonExt>(
 ) -> AdcCommon<ADCC> {
     let cfg = cfg.to_bits(rcc);
 
-    unsafe {
-        let rcc_ptr = &(*stm32::RCC::ptr());
-        ADCC::enable(rcc_ptr);
-        ADCC::reset(rcc_ptr);
-    }
+    ADCC::enable(rcc);
+    ADCC::reset(rcc);
 
     // Select system clock as ADC clock source
     rcc.rb

src/can.rs

@@ -33,13 +33,13 @@ where
         self,
         _tx: TX,
         _rx: RX,
-        rcc: &Rcc,
+        rcc: &mut Rcc,
     ) -> fdcan::FdCan<Can<Self>, fdcan::ConfigMode>
     where
         TX: sealed::Tx<Self>,
         RX: sealed::Rx<Self>,
     {
-        Self::enable(&rcc.rb);
+        Self::enable(rcc);
 
         self.fdcan_unchecked()
     }

src/dac.rs

@@ -13,7 +13,6 @@ use crate::gpio::{Analog, PA4, PA5, PA6};
 use crate::pac;
 use crate::rcc::{self, *};
 use crate::stm32::dac1::mcr::HFSEL;
-use crate::stm32::RCC;
 use embedded_hal::delay::DelayNs;
 
 pub trait DacOut<V> {
@@ -458,15 +457,12 @@ pub trait DacExt: Sized {
 }
 
 impl<DAC: Instance> DacExt for DAC {
-    fn constrain<PINS>(self, _pins: PINS, _rcc: &mut Rcc) -> PINS::Output
+    fn constrain<PINS>(self, _pins: PINS, rcc: &mut Rcc) -> PINS::Output
     where
         PINS: Pins<Self>,
     {
-        unsafe {
-            let rcc_ptr = &(*RCC::ptr());
-            Self::enable(rcc_ptr);
-            Self::reset(rcc_ptr);
-        }
+        Self::enable(rcc);
+        Self::reset(rcc);
 
         #[allow(clippy::uninit_assumed_init)]
         unsafe {

src/delay.rs

@@ -119,17 +119,12 @@ impl DelayMs<u8> for SystDelay {
 }
 
 pub trait DelayExt {
-    fn delay<T>(&mut self, delay: T)
-    where
-        T: Into<MicroSecond>;
+    fn delay(&mut self, delay: MicroSecond);
 }
 
 impl DelayExt for SystDelay {
-    fn delay<T>(&mut self, delay: T)
-    where
-        T: Into<MicroSecond>,
-    {
-        self.0.delay_us(delay.into().ticks())
+    fn delay(&mut self, delay: MicroSecond) {
+        self.0.delay_us(delay.ticks())
     }
 }
 

src/gpio.rs

@@ -582,8 +582,8 @@ macro_rules! gpio {
                 type Parts = Parts;
 
                 fn split(self, rcc: &mut Rcc) -> Parts {
-                    Self::enable(&rcc.rb);
-                    Self::reset(&rcc.rb);
+                    Self::enable(rcc);
+                    Self::reset(rcc);
 
                     Parts {
                         $(

src/i2c.rs

@@ -12,7 +12,7 @@ use crate::rcc::{Enable, GetBusFreq, Rcc, RccBus, Reset};
     feature = "stm32g484"
 ))]
 use crate::stm32::I2C4;
-use crate::stm32::{I2C1, I2C2, I2C3, RCC};
+use crate::stm32::{I2C1, I2C2, I2C3};
 use crate::time::Hertz;
 use core::cmp;
 use core::convert::TryInto;
@@ -29,12 +29,9 @@ pub struct Config {
 
 impl Config {
     /// Creates a default configuration for the given bus frequency.
-    pub fn new<T>(speed: T) -> Self
-    where
-        T: Into<Hertz>,
-    {
+    pub fn new(speed: Hertz) -> Self {
         Config {
-            speed: Some(speed.into()),
+            speed: Some(speed),
             timing: None,
             analog_filter: true,
             digital_filter: 0,
@@ -98,16 +95,17 @@ impl Config {
             (psc, scll, sclh, sdadel, scldel)
         };
 
-        reg.presc()
-            .set(psc.try_into().unwrap())
-            .scldel()
-            .set(scldel)
-            .sdadel()
-            .set(sdadel)
-            .sclh()
-            .set(sclh.try_into().unwrap())
-            .scll()
-            .set(scll.try_into().unwrap())
+        reg.presc().set(psc.try_into().unwrap());
+        reg.scldel().set(scldel);
+        reg.sdadel().set(sdadel);
+        reg.sclh().set(sclh.try_into().unwrap());
+        reg.scll().set(scll.try_into().unwrap())
+    }
+}
+
+impl From<Hertz> for Config {
+    fn from(value: Hertz) -> Self {
+        Self::new(value)
     }
 }
 
@@ -149,7 +147,13 @@ impl embedded_hal::i2c::Error for Error {
 }
 
 pub trait I2cExt<I2C> {
-    fn i2c<SDA, SCL>(self, sda: SDA, scl: SCL, config: Config, rcc: &mut Rcc) -> I2c<I2C, SDA, SCL>
+    fn i2c<SDA, SCL>(
+        self,
+        sda: SDA,
+        scl: SCL,
+        config: impl Into<Config>,
+        rcc: &mut Rcc,
+    ) -> I2c<I2C, SDA, SCL>
     where
         SDA: SDAPin<I2C>,
         SCL: SCLPin<I2C>;
@@ -216,7 +220,7 @@ macro_rules! i2c {
                 self,
                 sda: SDA,
                 scl: SCL,
-                config: Config,
+                config: impl Into<Config>,
                 rcc: &mut Rcc,
             ) -> I2c<$I2CX, SDA, SCL>
             where
@@ -232,17 +236,15 @@ macro_rules! i2c {
             SCL: SCLPin<$I2CX>
         {
             /// Initializes the I2C peripheral.
-            pub fn $i2cx(i2c: $I2CX, sda: SDA, scl: SCL, config: Config, rcc: &mut Rcc) -> Self
+            pub fn $i2cx(i2c: $I2CX, sda: SDA, scl: SCL, config: impl Into<Config>, rcc: &mut Rcc) -> Self
             where
                 SDA: SDAPin<$I2CX>,
                 SCL: SCLPin<$I2CX>,
             {
+                let config = config.into();
                 // Enable and reset I2C
-                unsafe {
-                    let rcc_ptr = &(*RCC::ptr());
-                    $I2CX::enable(rcc_ptr);
-                    $I2CX::reset(rcc_ptr);
-                }
+                $I2CX::enable(rcc);
+                $I2CX::reset(rcc);
 
                 // Make sure the I2C unit is disabled so we can configure it
                 i2c.cr1().modify(|_, w| w.pe().clear_bit());
@@ -252,12 +254,9 @@ macro_rules! i2c {
 
                 // Enable the I2C processing
                 i2c.cr1().modify(|_, w| {
-                    w.pe()
-                        .set_bit()
-                        .dnf()
-                        .set(config.digital_filter)
-                        .anfoff()
-                        .bit(!config.analog_filter)
+                    w.pe().set_bit();
+                    w.dnf().set(config.digital_filter);
+                    w.anfoff().bit(!config.analog_filter)
                 });
 
                 I2c { i2c, sda, scl }
@@ -267,9 +266,8 @@ macro_rules! i2c {
             pub fn release(self) -> ($I2CX, SDA, SCL) {
                 // Disable I2C.
                 unsafe {
-                    let rcc_ptr = &(*RCC::ptr());
-                    $I2CX::reset(rcc_ptr);
-                    $I2CX::disable(rcc_ptr);
+                    $I2CX::reset_unchecked();
+                    $I2CX::disable_unchecked();
                 }
 
                 (self.i2c, self.sda, self.scl)

src/pwm.rs

@@ -173,7 +173,6 @@ use core::marker::PhantomData;
 use core::mem::MaybeUninit;
 
 use crate::stm32::LPTIMER1;
-use crate::stm32::RCC;
 #[cfg(any(
     feature = "stm32g473",
     feature = "stm32g474",
@@ -1147,11 +1146,8 @@ macro_rules! tim_hal {
             where
                 PINS: Pins<$TIMX, T, U>,
             {
-                unsafe {
-                    let rcc_ptr = &(*RCC::ptr());
-                    $TIMX::enable(rcc_ptr);
-                    $TIMX::reset(rcc_ptr);
-                }
+                $TIMX::enable(rcc);
+                $TIMX::reset(rcc);
 
                 let clk = $TIMX::get_timer_frequency(&rcc.clocks);
 
@@ -1189,11 +1185,8 @@ macro_rules! tim_hal {
                 where
                     PINS: Pins<Self, CHANNEL, COMP>
                 {
-                    unsafe {
-                        let rcc_ptr = &(*RCC::ptr());
-                        $TIMX::enable(rcc_ptr);
-                        $TIMX::reset(rcc_ptr);
-                    }
+                    $TIMX::enable(rcc);
+                    $TIMX::reset(rcc);
 
                     let clk = $TIMX::get_timer_frequency(&rcc.clocks).raw();
 
@@ -1801,11 +1794,8 @@ macro_rules! lptim_hal {
             where
                 PINS: Pins<$TIMX, T, U>,
             {
-                unsafe {
-                    let rcc_ptr = &(*RCC::ptr());
-                    $TIMX::enable(rcc_ptr);
-                    $TIMX::reset(rcc_ptr);
-                }
+                $TIMX::enable(rcc);
+                $TIMX::reset(rcc);
 
                 let clk = $TIMX::get_timer_frequency(&rcc.clocks);
                 let reload = clk / freq;

src/rcc/clockout.rs

@@ -1,6 +1,6 @@
 use crate::gpio::*;
+use crate::pac::RCC;
 use crate::rcc::*;
-use crate::stm32::RCC;
 
 pub type LscoPin = gpioa::PA2<Analog>;
 

src/rcc/config.rs

@@ -392,6 +392,10 @@ impl Config {
         Config::const_default().clock_src(SysClockSrc::HSI)
     }
 
+    pub const fn hse(freq: Hertz) -> Self {
+        Config::const_default().clock_src(SysClockSrc::HSE(freq))
+    }
+
     pub const fn clock_src(mut self, mux: SysClockSrc) -> Self {
         self.sys_mux = mux;
         self