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examples/spi-dma.rs

Lines changed: 14 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,7 @@
1+
//! This example shows off the using the SPI with the DMA engine
2+
//!
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//! For more docs, see https://docs.rs/stm32h7xx-hal/latest/stm32h5xx_hal/spi/index.html
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//!
15
#![deny(warnings)]
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#![no_main]
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#![no_std]
@@ -11,7 +15,7 @@ use cortex_m_semihosting::debug;
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use stm32h5xx_hal::{
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pac,
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prelude::*,
14-
spi::{self, Config as SpiConfig, Spi, dma::DuplexDmaTransfer},
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spi::{self, dma::DuplexDmaTransfer, Config as SpiConfig},
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};
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static mut SOURCE_BYTES: MaybeUninit<[u8; 40]> = MaybeUninit::uninit();
@@ -45,13 +49,12 @@ fn main() -> ! {
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4650
let dp = pac::Peripherals::take().unwrap();
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48-
// Constrain and Freeze power
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log::info!("Setup PWR... ");
52+
// Select highest power mode for max possible clock frequency
5053
let pwr = dp.PWR.constrain();
51-
let pwrcfg = pwr.freeze();
54+
let pwrcfg = pwr.vos0().freeze();
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53-
// Constrain and Freeze clock
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log::info!("Setup RCC... ");
56+
// Configure system PLLs and clocks - choose a PLL1 output so 1MHz SPI clock can be exactly
57+
// derived from it
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let rcc = dp.RCC.constrain();
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let ccdr = rcc
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.sys_ck(192.MHz())
@@ -62,14 +65,16 @@ fn main() -> ! {
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// GPIOB in the RCC register.
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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68+
// This example requires that MISO is connected to MOSI via a jumper (pins 28 and 26 on CN10
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// header on NUCLEO-H503RB)
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let sck = gpiob.pb13.into_alternate();
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let miso = gpiob.pb14.into_alternate();
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let mosi = gpiob.pb15.into_alternate();
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log::info!("stm32h5xx-hal example - SPI DMA");
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// Initialise the SPI peripheral.
72-
let mut spi: Spi<_, u8> = dp.SPI2.spi(
77+
let mut spi = dp.SPI2.spi(
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(sck, miso, mosi),
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SpiConfig::new(spi::MODE_0),
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1.MHz(),
@@ -83,7 +88,8 @@ fn main() -> ! {
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let tx_ch = channels.0;
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let rx_ch = channels.1;
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86-
let mut transfer = DuplexDmaTransfer::new(&mut spi, tx_ch, rx_ch, source_buf, dest_buf);
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let mut transfer =
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DuplexDmaTransfer::new(&mut spi, tx_ch, rx_ch, source_buf, dest_buf);
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transfer.start().unwrap();
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transfer.wait_for_complete().unwrap();
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let (_, _, source_buf, dest_buf) = transfer.free().unwrap();

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