gpdma: add GPDMA driver (#64)

This adds support for one-shot DMA transfers for all supported transfer
types with linear addressing. It does not yet support linked list buffer
loading, or support 2D addressing.

Memory-to-memory transfers were quite thoroughly tested by the provided
example, memory-to-peripheral and peripheral-to-memory transfers were
tested with the SPI peripheral (working on a test branch).
Peripheral-to-peripheral transfers are assumed to work given their
similarity to memory-to-peripheral/peripheral-to-memory transfers, but
will be properly tested at a later stage.

The driver includes helper structs for peripheral transfers in the
`gpdma::periph` module which handle the common operations for setting up
one-directional and full-duplex transfers using one, or two channels,
respectively.

Transfer configuration is performed via `DmaConfig`. Additionally, the
`transform` module includes support for configuring the data
transformation pipeline supported by the GPDMA peripheral, only allowing
relevant options to be supported based on the source and destination
word sizes.

---------

Co-authored-by: Albin Hedman <[email protected]>

Author: astapleton

Cargo.toml

@@ -66,6 +66,7 @@ defmt = [
 cortex-m = { version = "^0.7.7", features = ["critical-section-single-core"] }
 stm32h5 = { package = "stm32h5", version = "0.16.0" }
 fugit = "0.3.7"
+embedded-dma = "0.2"
 embedded-hal = "1.0.0"
 defmt = { version = "1.0.0", optional = true }
 paste = "1.0.15"

examples/dma.rs

@@ -0,0 +1,124 @@
+// #![deny(warnings)]
+#![no_main]
+#![no_std]
+
+mod utilities;
+
+use cortex_m::singleton;
+use cortex_m_rt::entry;
+use cortex_m_semihosting::debug;
+use stm32h5xx_hal::{
+    gpdma::{config::transform::*, DmaConfig, DmaTransfer},
+    pac,
+    prelude::*,
+};
+
+#[entry]
+fn main() -> ! {
+    utilities::logger::init();
+
+    let dp = pac::Peripherals::take().unwrap();
+
+    let pwr = dp.PWR.constrain();
+    let pwrcfg = pwr.vos0().freeze();
+
+    // Constrain and Freeze clock
+    let rcc = dp.RCC.constrain();
+    let ccdr = rcc.sys_ck(250.MHz()).freeze(pwrcfg, &dp.SBS);
+
+    let channels = dp.GPDMA1.channels(ccdr.peripheral.GPDMA1);
+
+    log::info!("u8 to u8");
+    let src =
+        singleton!(: [u8; 40] = core::array::from_fn(|i| i as u8)).unwrap();
+
+    let dest = singleton!(: [u8; 40] = [0u8; 40]).unwrap();
+
+    let mut channel = channels.0;
+    let config = DmaConfig::new();
+    let mut transfer =
+        DmaTransfer::memory_to_memory(config, &mut channel, src, dest);
+    transfer.start().unwrap();
+    transfer.wait_for_transfer_complete().unwrap();
+    let (src, dest) = transfer.free();
+    assert_eq!(src, dest);
+
+    log::info!("u32 to u32 with data transform");
+    let src = singleton!(: [u32; 10] = [0x12345678u32; 10]).unwrap();
+    let dest = singleton!(: [u32; 10] = [0u32; 10]).unwrap();
+
+    let config = DmaConfig::new().with_data_transform(
+        DataTransform::builder()
+            .swap_destination_half_words()
+            .swap_destination_half_word_byte_order(),
+    );
+
+    let mut transfer =
+        DmaTransfer::memory_to_memory(config, &mut channel, src, dest);
+
+    transfer.start().unwrap();
+    transfer.wait_for_transfer_complete().unwrap();
+    let (_, dest) = transfer.free();
+
+    let expected = [0x78563412; 10];
+    assert_eq!(expected, *dest);
+
+    log::info!("u32 to u16 with truncate");
+    let src = singleton!(: [u32; 10] = [0x12345678u32; 10]).unwrap();
+    let dest = singleton!(: [u16; 20] = [0u16; 20]).unwrap();
+
+    let config = DmaConfig::new().with_data_transform(
+        DataTransform::builder().left_align_right_truncate(),
+    );
+    let mut transfer =
+        DmaTransfer::memory_to_memory(config, &mut channel, src, dest);
+
+    transfer.start().unwrap();
+    transfer.wait_for_transfer_complete().unwrap();
+    let (_, dest) = transfer.free();
+
+    let expected = [0x1234; 10];
+    assert_eq!(expected, (*dest)[0..10]);
+
+    log::info!("u32 to u8 with unpack");
+    let src = singleton!(: [u32; 10] = [0x12345678u32; 10]).unwrap();
+    let dest = singleton!(: [u8; 40] = [0u8; 40]).unwrap();
+
+    let config =
+        DmaConfig::new().with_data_transform(DataTransform::builder().unpack());
+    let mut transfer =
+        DmaTransfer::memory_to_memory(config, &mut channel, src, dest);
+
+    transfer.start().unwrap();
+    transfer.wait_for_transfer_complete().unwrap();
+    let (_, dest) = transfer.free();
+    let expected = [0x78, 0x56, 0x34, 0x12];
+    assert_eq!(expected, (*dest)[0..4]);
+    assert_eq!(expected, (*dest)[36..40]);
+
+    log::info!("u8 to u32 with pack");
+    let src = singleton!(: [u8; 40] = [0u8; 40]).unwrap();
+    let dest = singleton!(: [u32; 10] = [0u32; 10]).unwrap();
+
+    for chunk in src.chunks_mut(4) {
+        chunk.copy_from_slice(&[0x78, 0x56, 0x34, 0x12]);
+    }
+
+    let config =
+        DmaConfig::new().with_data_transform(DataTransform::builder().pack());
+    let mut transfer =
+        DmaTransfer::memory_to_memory(config, &mut channel, src, dest);
+
+    transfer.start().unwrap();
+    transfer.wait_for_transfer_complete().unwrap();
+    let (_, dest) = transfer.free();
+
+    let expected = [0x12345678; 10];
+    assert_eq!(expected, *dest);
+    assert_eq!(expected, *dest);
+
+    log::info!("All tests passed!");
+    loop {
+        debug::exit(debug::EXIT_SUCCESS)
+    }
+}