Merge #94

94: Add method to initialise ADC1 and ADC2 together r=richardeoin a=richardeoin

See #93 

Co-authored-by: Richard Meadows <[email protected]>

Author: bors[bot]

examples/adc.rs

@@ -1,4 +1,8 @@
-#![deny(unsafe_code)]
+//! Example of reading a voltage with ADC1
+//!
+//! For an example of using ADC3, see examples/temperature.rs
+//! For an example of using ADC1 and ADC2 together, see examples/adc12.rs
+
 #![no_main]
 #![no_std]
 
@@ -28,40 +32,54 @@ fn main() -> ! {
     println!(log, "Setup RCC...                  ");
     let rcc = dp.RCC.constrain();
 
-    // setting this per_ck to 4 Mhz here (which is gonna choose the CSI that runs at exactly 4 Mhz) as the adc requires per_ck as its
-    // own kernel clock and wouldn't work at all if per_ck wouldnt be enabled or loose a few bits if it was too fast
-    // (the maximum for this is 36 Mhz)
+    // We need to configure a clock for adc_ker_ck_input. The default
+    // adc_ker_ck_input is pll2_p_ck, but we will use per_ck. Here we
+    // set per_ck to 4MHz.
+    //
+    // The maximum adc_ker_ck_input frequency is 100MHz for revision V and 36MHz
+    // otherwise
     let ccdr = rcc
         .sys_ck(100.mhz())
         .per_ck(4.mhz())
         .freeze(vos, &dp.SYSCFG);
 
+    // Switch adc_ker_ck_input multiplexer to per_ck
+    let d3ccipr = &unsafe { &*pac::RCC::ptr() }.d3ccipr;
+    d3ccipr.modify(|_, w| unsafe { w.adcsel().bits(0b10) });
+
     println!(log, "");
     println!(log, "stm32h7xx-hal example - ADC");
     println!(log, "");
 
     let mut delay = Delay::new(cp.SYST, ccdr.clocks);
 
     // Setup ADC
-    let mut adc3 =
-        adc::Adc::adc3(dp.ADC3, &mut delay, ccdr.peripheral.ADC3, &ccdr.clocks)
-            .enable();
-    adc3.set_resolution(adc::Resolution::SIXTEENBIT);
+    let mut adc1 = adc::Adc::adc1(
+        dp.ADC1,
+        &mut delay,
+        ccdr.peripheral.ADC12,
+        &ccdr.clocks,
+    )
+    .enable();
+    adc1.set_resolution(adc::Resolution::SIXTEENBIT);
+
+    // We can't use ADC2 here because ccdr.peripheral.ADC12 has been
+    // consumed. See examples/adc12.rs
 
     // Setup GPIOC
     let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
 
     // Configure pc0 as an analog input
-    let mut channel = gpioc.pc0.into_analog();
+    let mut channel = gpioc.pc0.into_analog(); // ANALOG IN 10
 
     loop {
-        let data: u32 = adc3.read(&mut channel).unwrap();
+        let data: u32 = adc1.read(&mut channel).unwrap();
         // voltage = reading * (vref/resolution)
         println!(
             log,
             "ADC reading: {}, voltage for nucleo: {}",
             data,
-            data as f32 * (3.3 / adc3.max_sample() as f32)
+            data as f32 * (3.3 / adc1.max_sample() as f32)
         );
     }
 }

examples/adc12.rs

@@ -0,0 +1,75 @@
+//! Example of using ADC1 and ADC2 together
+//!
+//! For an example of using ADC3, see examples/temperature.rs
+//! For an example of using ADC1 alone, see examples/adc.rs
+
+#![deny(unsafe_code)]
+#![no_main]
+#![no_std]
+
+extern crate panic_itm;
+
+use cortex_m;
+use cortex_m_rt::entry;
+
+use stm32h7xx_hal::{adc, delay::Delay, pac, prelude::*};
+
+use cortex_m_log::println;
+use cortex_m_log::{
+    destination::Itm, printer::itm::InterruptSync as InterruptSyncItm,
+};
+
+#[entry]
+fn main() -> ! {
+    let cp = cortex_m::Peripherals::take().unwrap();
+    let dp = pac::Peripherals::take().unwrap();
+    let mut log = InterruptSyncItm::new(Itm::new(cp.ITM));
+
+    // Constrain and Freeze power
+    println!(log, "Setup PWR...                  ");
+    let pwr = dp.PWR.constrain();
+    let vos = pwr.freeze();
+
+    // Constrain and Freeze clock
+    println!(log, "Setup RCC...                  ");
+    let rcc = dp.RCC.constrain();
+
+    let ccdr = rcc
+        .sys_ck(100.mhz())
+        .pll2_p_ck(4.mhz()) // Default adc_ker_ck_input
+        .freeze(vos, &dp.SYSCFG);
+
+    println!(log, "");
+    println!(log, "stm32h7xx-hal example - ADC1 and ADC2");
+    println!(log, "");
+
+    let mut delay = Delay::new(cp.SYST, ccdr.clocks);
+
+    // Setup ADC1 and ADC2
+    let (adc1, adc2) = adc::adc12(
+        dp.ADC1,
+        dp.ADC2,
+        &mut delay,
+        ccdr.peripheral.ADC12,
+        &ccdr.clocks,
+    );
+
+    let mut adc1 = adc1.enable();
+    adc1.set_resolution(adc::Resolution::SIXTEENBIT);
+
+    let mut adc2 = adc2.enable();
+    adc2.set_resolution(adc::Resolution::SIXTEENBIT);
+
+    // Setup GPIOC
+    // NOTE: PC2 and PC3 are only pinned out on TFBGA packages!!
+    let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
+    let mut channel_pc2 = gpioc.pc2.into_analog(); // AIN 12
+    let mut channel_pc3 = gpioc.pc3.into_analog(); // AIN 13
+
+    loop {
+        let data_pc2: u32 = adc1.read(&mut channel_pc2).unwrap();
+        let data_pc3: u32 = adc2.read(&mut channel_pc3).unwrap();
+        // voltage = reading * (vref/resolution)
+        println!(log, "ADC readings: {} {}", data_pc2, data_pc3);
+    }
+}

examples/temperature.rs

@@ -1,3 +1,8 @@
+//! Example for using ADC3 to read the internal temperature sensor
+//!
+//! For an example of using ADC1, see examples/adc.rs
+//! For an example of using ADC1 and ADC2 together, see examples/adc12.rs
+
 #![deny(unsafe_code)]
 #![no_main]
 #![no_std]
@@ -36,7 +41,7 @@ fn main() -> ! {
 
     let ccdr = rcc
         .sys_ck(100.mhz())
-        .per_ck(4.mhz())
+        .pll2_p_ck(4.mhz()) // Default adc_ker_ck_input
         .freeze(vos, &dp.SYSCFG);
 
     println!(log, "");

src/adc.rs

@@ -1,11 +1,13 @@
 //! Analog to Digital Converter (ADC)
+//!
+//! ADC1 and ADC2 share a reset line. To initialise both of them, use the
+//! [`adc12`](adc12) method.
 
 use crate::hal::adc::{Channel, OneShot};
 use crate::hal::blocking::delay::DelayUs;
 
 use core::marker::PhantomData;
 
-use crate::stm32;
 use crate::stm32::{ADC1, ADC2, ADC3, ADC3_COMMON};
 
 use crate::delay::Delay;
@@ -17,7 +19,10 @@ use crate::gpio::gpiof::{
 };
 use crate::gpio::gpioh::{PH2, PH3, PH4, PH5};
 use crate::gpio::Analog;
+use crate::rcc::rec::AdcClkSelGetter;
 use crate::rcc::{rec, CoreClocks, ResetEnable};
+use crate::time::Hertz;
+use stm32h7::Variant::Val;
 
 #[cfg(not(feature = "revision_v"))]
 const ADC_KER_CK_MAX: u32 = 36_000_000;
@@ -287,13 +292,87 @@ pub trait AdcExt<ADC>: Sized {
 #[derive(Copy, Clone, Debug, PartialEq)]
 pub struct StoredConfig(AdcSampleTime, Resolution, AdcLshift);
 
+/// Get and check the adc_ker_ck_input
+fn check_clock(prec: &impl AdcClkSelGetter, clocks: &CoreClocks) -> Hertz {
+    // Select Kernel Clock
+    let adc_clock = match prec.get_kernel_clk_mux() {
+        Val(rec::AdcClkSel::PLL2_P) => clocks.pll2_p_ck(),
+        Val(rec::AdcClkSel::PLL3_R) => clocks.pll3_r_ck(),
+        Val(rec::AdcClkSel::PER) => clocks.per_ck(),
+        _ => unreachable!(),
+    }
+    .expect("adc_ker_ck_input is not running!");
+
+    // Check against datasheet requirements
+    assert!(
+        adc_clock.0 <= ADC_KER_CK_MAX,
+        "adc_ker_ck_input is too fast"
+    );
+
+    adc_clock
+}
+
+// ADC12 is a unique case where a single reset line is used to control two
+// peripherals that have separate peripheral definitons in the SVD.
+
+/// Initialise ADC12 together
+///
+/// Sets all configurable parameters to one-shot defaults,
+/// performs a boot-time calibration.
+pub fn adc12(
+    adc1: ADC1,
+    adc2: ADC2,
+    delay: &mut Delay,
+    prec: rec::Adc12,
+    clocks: &CoreClocks,
+) -> (Adc<ADC1, Disabled>, Adc<ADC2, Disabled>) {
+    // Consume ADC register block, produce ADC1/2 with default settings
+    let mut adc1 = Adc::<ADC1, Disabled>::default_from_rb(adc1);
+    let mut adc2 = Adc::<ADC2, Disabled>::default_from_rb(adc2);
+
+    // Check adc_ker_ck_input
+    check_clock(&prec, clocks);
+
+    // Enable AHB clock
+    let prec = prec.enable();
+
+    // Power Down
+    adc1.power_down();
+    adc2.power_down();
+
+    // Reset peripheral
+    prec.reset();
+
+    // Power Up, Preconfigure and Calibrate
+    adc1.power_up(delay);
+    adc2.power_up(delay);
+    adc1.preconfigure();
+    adc2.preconfigure();
+    adc1.calibrate();
+    adc2.calibrate();
+
+    (adc1, adc2)
+}
+
+/// Freeing both the periperhal and PREC is possible for ADC3
+impl<ED> Adc<ADC3, ED> {
+    /// Releases the ADC peripheral
+    pub fn free(self) -> (ADC3, rec::Adc3) {
+        (
+            self.rb,
+            rec::Adc3 {
+                _marker: PhantomData,
+            },
+        )
+    }
+}
+
 #[allow(unused_macros)]
 macro_rules! adc_hal {
     ($(
         $ADC:ident: (
             $adcX: ident,
-            $Rec:ident,
-            $COMMON:ident
+            $Rec:ident
         )
     ),+ $(,)*) => {
         $(
@@ -317,46 +396,39 @@ macro_rules! adc_hal {
                 pub fn $adcX(adc: $ADC, delay: &mut Delay,
                              prec: rec::$Rec, clocks: &CoreClocks
                 ) -> Self {
-                    let mut s = Self {
-                        rb: adc,
-                        sample_time: AdcSampleTime::default(),
-                        resolution: Resolution::SIXTEENBIT,
-                        lshift: AdcLshift::default(),
-                        _enabled: PhantomData,
-                    };
+                    // Consume ADC register block, produce Self with default
+                    // settings
+                    let mut adc = Self::default_from_rb(adc);
 
-                    // Select Kernel Clock
-                    s.enable_clock(
-                        clocks.per_ck().expect("per_ck is not running!").0
-                    );
+                    // Check adc_ker_ck_input
+                    check_clock(&prec, clocks);
 
                     // Enable AHB clock
                     let prec = prec.enable();
 
                     // Power Down
-                    s.power_down();
+                    adc.power_down();
 
-                    // Reset periperal
+                    // Reset peripheral
                     prec.reset();
 
                     // Power Up, Preconfigure and Calibrate
-                    s.power_up(delay);
-                    s.preconfigure();
-                    s.calibrate();
+                    adc.power_up(delay);
+                    adc.preconfigure();
+                    adc.calibrate();
 
-                    s
+                    adc
                 }
-
-                fn enable_clock(&mut self, per_ck: u32) {
-                    // Set per_ck as adc clock, TODO: we might want to
-                    // change this so we can also use other clocks as
-                    // input for this
-                    assert!(per_ck <= ADC_KER_CK_MAX, "per_ck is not running or too fast");
-                    let d3ccipr = &unsafe { &*stm32::RCC::ptr() }.d3ccipr;
-
-                    d3ccipr.modify(|_, w| unsafe { w.adcsel().bits(0b10) });
+                /// Creates ADC with default settings
+                fn default_from_rb(rb: $ADC) -> Self {
+                    Self {
+                        rb,
+                        sample_time: AdcSampleTime::default(),
+                        resolution: Resolution::SIXTEENBIT,
+                        lshift: AdcLshift::default(),
+                        _enabled: PhantomData,
+                    }
                 }
-
                 /// Disables Deeppowerdown-mode and enables voltage regulator
                 ///
                 /// Note: After power-up, a [`calibration`](#method.calibrate) shall be run
@@ -571,12 +643,6 @@ macro_rules! adc_hal {
             }
 
             impl<ED> Adc<$ADC, ED> {
-
-                /// Releases the ADC peripheral
-                pub fn free(self) -> ($ADC, rec::$Rec) {
-                    (self.rb, rec::$Rec { _marker: PhantomData })
-                }
-
                 /// Save current ADC config
                 pub fn save_cfg(&mut self) -> StoredConfig {
                     StoredConfig(self.get_sample_time(), self.get_resolution(), self.get_lshift())
@@ -714,7 +780,7 @@ macro_rules! adc_hal {
 }
 
 adc_hal!(
-    ADC1: (adc1, Adc12, ADC12_COMMON),
-    ADC2: (adc2, Adc12, ADC12_COMMON),
-    ADC3: (adc3, Adc3, ADC3_COMMON),
+    ADC1: (adc1, Adc12), // ADC1
+    ADC2: (adc2, Adc12), // ADC2
+    ADC3: (adc3, Adc3),  // ADC3
 );

src/rcc/rec.rs

@@ -266,7 +266,7 @@ peripheral_reset_and_enable_control! {
     AHB1, "AMBA High-performance Bus (AHB1) peripherals" => [
         Eth1Mac, Dma2, Dma1,
         #[cfg(any(feature = "dualcore"))] Art,
-        Adc12
+        Adc12 [group clk: Adc(Variant) d3ccip "ADC"]
     ];
 
     AHB2, "AMBA High-performance Bus (AHB2) peripherals" => [
@@ -283,7 +283,8 @@ peripheral_reset_and_enable_control! {
     ];
 
     AHB4, "AMBA High-performance Bus (AHB4) peripherals" => [
-        Hsem, Bdma, Crc, Adc3,
+        Hsem, Bdma, Crc,
+        Adc3 [group clk: Adc],
         Gpioa, Gpiob, Gpioc, Gpiod, Gpioe, Gpiof, Gpiog, Gpioh, Gpioi, Gpioj, Gpiok
     ];