Implement i2c::TransactionIter trait

Cargo.toml

@@ -26,7 +26,7 @@ as-slice = "0.2.1"
 cast = { version = "0.3.0", default-features = false }
 cortex-m = "0.7.0"
 cortex-m-rt = "0.7.0"
-embedded-hal = { version = "0.2.3", features = ["unproven"] }
+embedded-hal = { version = "0.2.7", features = ["unproven"] }
 embedded-time = "0.12.0"
 nb = "1.0.0"
 rtcc = { version = "0.3.0", optional = true }

src/i2c.rs

@@ -7,6 +7,7 @@ use core::{marker::PhantomData, ops::DerefMut, pin::Pin};
 
 #[cfg(feature = "stm32l0x2")]
 use as_slice::{AsMutSlice, AsSlice};
+use embedded_hal::blocking::i2c::Operation;
 
 #[cfg(feature = "stm32l0x2")]
 use crate::dma::{self, Buffer};
@@ -19,7 +20,7 @@ use cast::u8;
 use embedded_time::rate::Hertz;
 
 // I²C traits
-use crate::hal::blocking::i2c::{Read, Write, WriteRead};
+use crate::hal::blocking::i2c::{Read, TransactionalIter, Write, WriteRead};
 
 // I/O Imports
 use crate::gpio::{AltMode, OpenDrain, Output};
@@ -455,6 +456,26 @@ where
     }
 }
 
+impl<I, SDA, SCL> TransactionalIter for I2c<I, SDA, SCL>
+where
+    I: Instance,
+{
+    type Error = Error;
+
+    fn exec_iter<'a, O>(&mut self, address: u8, operations: O) -> Result<(), Self::Error>
+    where
+        O: IntoIterator<Item = Operation<'a>>,
+    {
+        for o in operations {
+            match o {
+                Operation::Read(bytes) => self.read(address, bytes)?,
+                Operation::Write(bytes) => self.write(address, bytes)?,
+            }
+        }
+        Ok(())
+    }
+}
+
 pub trait Instance: Deref<Target = RegisterBlock> + Enable + Reset {
     fn ptr() -> *const RegisterBlock;
 }