@@ -54,11 +54,9 @@ impl RccExt for RCC {
5454 apb2 : APB2 { _0 : ( ) } ,
5555 bdcr : BDCR { _0 : ( ) } ,
5656 csr : CSR { _0 : ( ) } ,
57- #[ cfg( not( feature = "stm32l47x" ) ) ]
5857 crrcr : CRRCR { _0 : ( ) } ,
5958 cfgr : CFGR {
6059 hclk : None ,
61- #[ cfg( not( feature = "stm32l47x" ) ) ]
6260 hsi48 : false ,
6361 msi : None ,
6462 lsi : false ,
@@ -92,7 +90,6 @@ pub struct Rcc {
9290 /// Control/Status Register
9391 pub csr : CSR ,
9492 /// Clock recovery RC register
95- #[ cfg( not( feature = "stm32l47x" ) ) ]
9693 pub crrcr : CRRCR ,
9794}
9895
@@ -111,12 +108,10 @@ impl CSR {
111108}
112109
113110/// Clock recovery RC register
114- #[ cfg( not( feature = "stm32l47x" ) ) ]
115111pub struct CRRCR {
116112 _0 : ( ) ,
117113}
118114
119- #[ cfg( not( feature = "stm32l47x" ) ) ]
120115impl CRRCR {
121116 // TODO remove `allow`
122117 #[ allow( dead_code) ]
@@ -263,8 +258,6 @@ const HSI: u32 = 16_000_000; // Hz
263258/// Clock configuration
264259pub struct CFGR {
265260 hclk : Option < u32 > ,
266- // should we use an option? it can really only be on/off
267- #[ cfg( not( feature = "stm32l47x" ) ) ]
268261 hsi48 : bool ,
269262 msi : Option < MsiFreq > ,
270263 lsi : bool ,
@@ -284,8 +277,7 @@ impl CFGR {
284277 self
285278 }
286279
287- /// Enable the 48Mh USB, RNG, SDMMC clock source.
288- #[ cfg( not( feature = "stm32l47x" ) ) ]
280+ /// Enable the 48Mh USB, RNG, SDMMC clock source. Not available on all stm32l4x6 series
289281 pub fn hsi48 ( mut self , on : bool ) -> Self
290282 {
291283 self . hsi48 = on;
@@ -343,7 +335,7 @@ impl CFGR {
343335 }
344336
345337 /// Freezes the clock configuration, making it effective
346- pub fn common_freeze ( & self , acr : & mut ACR ) -> ( Hertz , Hertz , Hertz , u8 , u8 , Hertz ) {
338+ pub fn freeze ( & self , acr : & mut ACR ) -> Clocks {
347339
348340 let pllconf = if self . pllcfg . is_none ( ) {
349341 let plln = ( 2 * self . sysclk . unwrap_or ( HSI ) ) / HSI ;
@@ -507,64 +499,32 @@ impl CFGR {
507499 while rcc. cr . read ( ) . msirdy ( ) . bit_is_clear ( ) { }
508500 }
509501
510- ( Hertz ( hclk) , Hertz ( pclk1) , Hertz ( pclk2) , ppre1, ppre2, Hertz ( sysclk) )
511- }
512-
513-
514- #[ cfg( not( feature = "stm32l47x" ) ) ]
515- pub fn freeze ( self , acr : & mut ACR ) -> Clocks {
516-
517- let ( hclk, pclk1, pclk2, ppre1, ppre2, sysclk) = self . common_freeze ( acr) ;
518- let mut usb_rng = false ;
519-
520- let rcc = unsafe { & * RCC :: ptr ( ) } ;
521- // Turn on USB, RNG Clock using the HSI48CLK source (default)
522- if !cfg ! ( feature = "stm32l47x" ) && self . hsi48 {
523- // p. 180 in ref-manual
524- rcc. crrcr . modify ( |_, w| w. hsi48on ( ) . set_bit ( ) ) ;
525- // Wait until HSI48 is running
526- while rcc. crrcr . read ( ) . hsi48rdy ( ) . bit_is_clear ( ) { }
527- usb_rng = true ;
528- }
529-
530- Clocks {
531- hclk,
532- lsi : self . lsi ,
533- hsi48 : self . hsi48 ,
534- usb_rng,
535- msi : self . msi ,
536- pclk1,
537- pclk2,
538- ppre1,
539- ppre2,
540- sysclk,
502+ {
503+ // Turn on USB, RNG Clock using the HSI48 CLK source (default)
504+ if self . hsi48 {
505+ // p. 180 in ref-manual
506+ rcc. crrcr . modify ( |_, w| w. hsi48on ( ) . set_bit ( ) ) ;
507+ // Wait until HSI48 is running
508+ while rcc. crrcr . read ( ) . hsi48rdy ( ) . bit_is_clear ( ) { }
509+ }
541510 }
542- }
543-
544- #[ cfg( feature = "stm32l47x" ) ]
545- pub fn freeze ( self , acr : & mut ACR ) -> Clocks {
546511
547- let ( hclk, pclk1, pclk2, ppre1, ppre2, sysclk) = self . common_freeze ( acr) ;
548-
549- let mut usb_rng = false ;
550-
551- let rcc = unsafe { & * RCC :: ptr ( ) } ;
552512 // Select MSI as clock source for usb48, rng ...
553513 if let Some ( MsiFreq :: RANGE48M ) = self . msi {
554- unsafe { rcc. ccipr . modify ( |_, w| w. clk48sel ( ) . bits ( 0b11 ) ) } ;
555- usb_rng = true ;
514+ unsafe { rcc. ccipr . modify ( |_, w| w. clk48sel ( ) . bits ( MsiFreq :: RANGE48M as u8 ) ) } ;
556515 }
516+ //TODO proper clk48sel and other selects
557517
558518 Clocks {
559- hclk,
519+ hclk : Hertz ( hclk ) ,
560520 lsi : self . lsi ,
561- usb_rng,
562521 msi : self . msi ,
563- pclk1,
564- pclk2,
565- ppre1,
566- ppre2,
567- sysclk,
522+ hsi48 : self . hsi48 ,
523+ pclk1 : Hertz ( pclk1) ,
524+ pclk2 : Hertz ( pclk2) ,
525+ ppre1 : ppre1,
526+ ppre2 : ppre2,
527+ sysclk : Hertz ( sysclk) ,
568528 }
569529 }
570530
@@ -587,9 +547,7 @@ pub struct PllConfig {
587547#[ derive( Clone , Copy , Debug ) ]
588548pub struct Clocks {
589549 hclk : Hertz ,
590- #[ cfg( not( feature = "stm32l47x" ) ) ]
591550 hsi48 : bool ,
592- usb_rng : bool ,
593551 msi : Option < MsiFreq > ,
594552 lsi : bool ,
595553 pclk1 : Hertz ,
@@ -608,14 +566,13 @@ impl Clocks {
608566 }
609567
610568 /// Returns status of HSI48
611- #[ cfg( not( feature = "stm32l47x" ) ) ]
612569 pub fn hsi48 ( & self ) -> bool {
613570 self . hsi48
614571 }
615572
616- /// Returns if usb rng clock is available
617- pub fn usb_rng ( & self ) -> bool {
618- self . usb_rng
573+ // Returns the status of the MSI
574+ pub fn msi ( & self ) -> Option < MsiFreq > {
575+ self . msi
619576 }
620577
621578 /// Returns status of HSI48
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