Add support for setting full whitening seed. (#366)

* Add support for setting full whitening seed.

* Address formatting issue

* Update hal/src/subghz/mod.rs

Co-authored-by: Alex Martens <[email protected]>

* Update hal/src/subghz/mod.rs

Co-authored-by: Alex Martens <[email protected]>

* Complete renaming to eliminate get_ prefixes

* Minor formatting fix

---------

Co-authored-by: Alex Martens <[email protected]>

Author: ShakenCodes

hal/src/subghz/mod.rs

@@ -703,6 +703,34 @@ where
         Ok(())
     }
 
+    // register read with fixed (one) length data
+    fn read_register(&mut self, register: Register) -> Result<u8, Error> {
+        let addr: [u8; 2] = register.address().to_be_bytes();
+        let mut result = [0_u8];
+
+        self.poll_not_busy();
+        {
+            let _nss: Nss = Nss::new();
+            self.spi
+                .write(&[OpCode::ReadRegister as u8, addr[0], addr[1], 0x00])?;
+            self.spi.transfer(&mut result)?;
+        }
+        self.poll_not_busy();
+
+        Ok(result[0])
+    }
+
+    /// Reads the PktCtrl register (GPKTCTL1A)
+    pub fn pkt_ctrl(&mut self) -> Result<PktCtrl, Error> {
+        let raw_pkt_ctrl = self.read_register(Register::GPKTCTL1A)?;
+        Ok(PktCtrl::from_raw(raw_pkt_ctrl))
+    }
+
+    /// Reads the Init Whitening register (GWHITEINIRL)
+    pub fn init_whitening(&mut self) -> Result<u8, Error> {
+        self.read_register(Register::GWHITEINIRL)
+    }
+
     /// Set the LoRa bit synchronization.
     pub fn set_bit_sync(&mut self, bs: BitSync) -> Result<(), Error> {
         self.write(wr_reg![GBSYNC, bs.as_bits()])
@@ -721,6 +749,15 @@ where
         self.write(wr_reg![GWHITEINIRL, init])
     }
 
+    /// Set the seed value for generic packet whitening.
+    pub fn set_whitening_seed(&mut self, seed: u16) -> Result<(), Error> {
+        let seed_as_array = u16::to_be_bytes(seed);
+        let pkt_ctrl_value = self.read_register(Register::GPKTCTL1A)?;
+        let new_pkt_ctrl = (pkt_ctrl_value & 0xFE) | (seed_as_array[0] & 0x01);
+        self.set_pkt_ctrl(PktCtrl::from_raw(new_pkt_ctrl))?;
+        self.set_init_whitening(seed_as_array[1])
+    }
+
     /// Set the initial value for generic packet CRC polynomial.
     pub fn set_crc_polynomial(&mut self, polynomial: u16) -> Result<(), Error> {
         let bytes: [u8; 2] = polynomial.to_be_bytes();
@@ -1312,7 +1349,7 @@ pub(crate) enum OpCode {
     GetStats = 0x10,
     GetStatus = 0xC0,
     ReadBuffer = 0x1E,
-    RegRegister = 0x1D,
+    ReadRegister = 0x1D,
     ResetStats = 0x00,
     SetBufferBaseAddress = 0x8F,
     SetCad = 0xC5,

testsuite/src/subghz.rs

@@ -21,9 +21,9 @@ use bsp::{
             rfbusys, wakeup, AddrComp, CalibrateImage, CfgIrq, CmdStatus, CodingRate, CrcType,
             FallbackMode, FskBandwidth, FskBitrate, FskFdev, FskModParams, FskPulseShape,
             GenericPacketParams, HeaderType, Irq, LoRaBandwidth, LoRaModParams, LoRaPacketParams,
-            LoRaSyncWord, Ocp, PaConfig, PacketType, PreambleDetection, RampTime, RegMode, RfFreq,
-            SleepCfg, SpreadingFactor, StandbyClk, Startup, Status, StatusMode, SubGhz, TcxoMode,
-            TcxoTrim, Timeout, TxParams,
+            LoRaSyncWord, Ocp, PaConfig, PacketType, PktCtrl, PreambleDetection, RampTime, RegMode,
+            RfFreq, SleepCfg, SpreadingFactor, StandbyClk, Startup, Status, StatusMode, SubGhz,
+            TcxoMode, TcxoTrim, Timeout, TxParams,
         },
         util::new_delay,
     },
@@ -380,6 +380,37 @@ mod tests {
         defmt::assert_eq!(status.mode(), Ok(StatusMode::StandbyRc));
     }
 
+    #[test]
+    fn read_write_register(ta: &mut TestArgs) {
+        let original_value = unwrap!(ta.sg.init_whitening());
+        let test_value = !original_value;
+        unwrap!(ta.sg.set_init_whitening(test_value));
+        let new_value = unwrap!(ta.sg.init_whitening());
+        defmt::assert_eq!(test_value, new_value);
+
+        unwrap!(ta.sg.set_init_whitening(original_value));
+    }
+
+    #[test]
+    fn set_whitening_seed_operations(ta: &mut TestArgs) {
+        let original_raw_pkt_ctrl = (unwrap!(ta.sg.pkt_ctrl())).as_bits();
+        let original_init_whitening = unwrap!(ta.sg.init_whitening());
+        let original_whitening_seed: u16 =
+            (((original_raw_pkt_ctrl & 0x01) as u16) << 8) | original_init_whitening as u16;
+        let test_value = !original_whitening_seed & 0x01FF;
+        let expected_raw_pkt_ctrl =
+            (original_raw_pkt_ctrl & 0xFE) | ((test_value >> 8) & 0x01) as u8;
+        let expected_init_whitening = (test_value & 0x00FF) as u8;
+
+        unwrap!(ta.sg.set_whitening_seed(test_value));
+
+        defmt::assert_eq!(expected_raw_pkt_ctrl, (unwrap!(ta.sg.pkt_ctrl())).as_bits());
+        defmt::assert_eq!(expected_init_whitening, unwrap!(ta.sg.init_whitening()));
+
+        unwrap!(ta.sg.set_init_whitening(original_init_whitening));
+        unwrap!(ta.sg.set_pkt_ctrl(PktCtrl::from_raw(original_raw_pkt_ctrl)));
+    }
+
     #[test]
     fn fsk_ping_pong(ta: &mut TestArgs) {
         let sg: &mut MySubghz = &mut ta.sg;