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Remove use of TimerMap_CONFIG (part2)
Timer IRQn Signed-off-by: Frederic.Pillon <[email protected]>
1 parent 13af5f0 commit 34103aa

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13 files changed

+238
-142
lines changed

13 files changed

+238
-142
lines changed

‎cores/arduino/stm32/PeripheralPins.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -62,8 +62,5 @@ extern const PinMap PinMap_SPI_SSEL[];
6262
extern const PinMap PinMap_CAN_RD[];
6363
extern const PinMap PinMap_CAN_TD[];
6464

65-
//*** TIMER ***
66-
extern const TimerMap TimerMap_CONFIG[];
67-
6865
#endif
6966

‎cores/arduino/stm32/pinmap.c

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -83,12 +83,3 @@ uint32_t pinmap_merge(uint32_t a, uint32_t b) {
8383
// error("pinmap mis-match");
8484
return (uint32_t)NC;
8585
}
86-
87-
uint32_t timermap_irq(TIM_TypeDef *tim, const TimerMap* map) {
88-
while (map->timer != NULL) {
89-
if (map->timer == tim)
90-
return map->irq;
91-
map++;
92-
}
93-
return (uint32_t)0;
94-
}

‎cores/arduino/stm32/pinmap.h

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -33,11 +33,6 @@ typedef struct {
3333
int function;
3434
} PinMap;
3535

36-
typedef struct {
37-
TIM_TypeDef *timer;
38-
IRQn_Type irq;
39-
} TimerMap;
40-
4136
bool pin_in_pinmap(PinName pin, const PinMap* map);
4237
void pin_function(PinName pin, int function);
4338

@@ -47,8 +42,6 @@ uint32_t pinmap_find_peripheral(PinName pin, const PinMap* map);
4742
uint32_t pinmap_find_function(PinName pin, const PinMap* map);
4843
uint32_t pinmap_merge(uint32_t a, uint32_t b);
4944

50-
uint32_t timermap_irq(TIM_TypeDef *tim, const TimerMap* map);
51-
5245
#ifdef __cplusplus
5346
}
5447
#endif

‎cores/arduino/stm32/timer.c

Lines changed: 160 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -218,6 +218,18 @@ void timer_enable_clock(TIM_HandleTypeDef *htim)
218218
timer_handles[16] = htim;
219219
}
220220
#endif
221+
#if defined(TIM18_BASE)
222+
if (htim->Instance == TIM18) {
223+
__HAL_RCC_TIM18_CLK_ENABLE();
224+
timer_handles[17] = htim;
225+
}
226+
#endif
227+
#if defined(TIM19_BASE)
228+
if (htim->Instance == TIM19) {
229+
__HAL_RCC_TIM19_CLK_ENABLE();
230+
timer_handles[18] = htim;
231+
}
232+
#endif
221233
#if defined(TIM20_BASE)
222234
if (htim->Instance == TIM20) {
223235
__HAL_RCC_TIM20_CLK_ENABLE();
@@ -331,6 +343,16 @@ void timer_disable_clock(TIM_HandleTypeDef *htim)
331343
__HAL_RCC_TIM17_CLK_DISABLE();
332344
}
333345
#endif
346+
#if defined(TIM18_BASE)
347+
if (htim->Instance == TIM18) {
348+
__HAL_RCC_TIM18_CLK_DISABLE();
349+
}
350+
#endif
351+
#if defined(TIM19_BASE)
352+
if (htim->Instance == TIM19) {
353+
__HAL_RCC_TIM19_CLK_DISABLE();
354+
}
355+
#endif
334356
#if defined(TIM20_BASE)
335357
if (htim->Instance == TIM20) {
336358
__HAL_RCC_TIM20_CLK_DISABLE();
@@ -357,8 +379,8 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim_base)
357379
{
358380
timer_enable_clock(htim_base);
359381

360-
HAL_NVIC_SetPriority(timermap_irq(htim_base->Instance, TimerMap_CONFIG), 15 ,0);
361-
HAL_NVIC_EnableIRQ(timermap_irq(htim_base->Instance, TimerMap_CONFIG));
382+
HAL_NVIC_SetPriority(getTimerIrq(htim_base->Instance), 15 ,0);
383+
HAL_NVIC_EnableIRQ(getTimerIrq(htim_base->Instance));
362384
}
363385

364386
/**
@@ -369,7 +391,7 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim_base)
369391
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim_base)
370392
{
371393
timer_disable_clock(htim_base);
372-
HAL_NVIC_DisableIRQ(timermap_irq(htim_base->Instance, TimerMap_CONFIG));
394+
HAL_NVIC_DisableIRQ(getTimerIrq(htim_base->Instance));
373395
}
374396

375397
/**
@@ -403,6 +425,137 @@ void TimerHandleInit(stimer_t *obj, uint16_t period, uint16_t prescaler)
403425
}
404426
}
405427

428+
/**
429+
* @brief This function return the timer clock source.
430+
* @param tim: timer instance
431+
* @retval 1 = PCLK1 or 2 = PCLK2 or 0 = unknown
432+
*/
433+
uint32_t getTimerIrq(TIM_TypeDef* tim)
434+
{
435+
uint32_t IRQn = 0;
436+
437+
if(tim != (TIM_TypeDef *)NC) {
438+
/* Get IRQn depending on TIM instance */
439+
switch ((uint32_t)tim) {
440+
#if defined(TIM1_BASE)
441+
case (uint32_t)TIM1:
442+
IRQn = TIM1_IRQn;
443+
break;
444+
#endif
445+
#if defined(TIM2_BASE)
446+
case (uint32_t)TIM2:
447+
IRQn = TIM2_IRQn;
448+
break;
449+
#endif
450+
#if defined(TIM3_BASE)
451+
case (uint32_t)TIM3:
452+
IRQn = TIM3_IRQn;
453+
break;
454+
#endif
455+
#if defined(TIM4_BASE)
456+
case (uint32_t)TIM4:
457+
IRQn = TIM4_IRQn;
458+
break;
459+
#endif
460+
#if defined(TIM5_BASE)
461+
case (uint32_t)TIM5:
462+
IRQn = TIM5_IRQn;
463+
break;
464+
#endif
465+
#if defined(TIM6_BASE)
466+
case (uint32_t)TIM6:
467+
IRQn = TIM6_IRQn;
468+
break;
469+
#endif
470+
#if defined(TIM7_BASE)
471+
case (uint32_t)TIM7:
472+
IRQn = TIM7_IRQn;
473+
break;
474+
#endif
475+
#if defined(TIM8_BASE)
476+
case (uint32_t)TIM8:
477+
IRQn = TIM8_IRQn;
478+
break;
479+
#endif
480+
#if defined(TIM9_BASE)
481+
case (uint32_t)TIM9:
482+
IRQn = TIM9_IRQn;
483+
break;
484+
#endif
485+
#if defined(TIM10_BASE)
486+
case (uint32_t)TIM10:
487+
IRQn = TIM10_IRQn;
488+
break;
489+
#endif
490+
#if defined(TIM11_BASE)
491+
case (uint32_t)TIM11:
492+
IRQn = TIM11_IRQn;
493+
break;
494+
#endif
495+
#if defined(TIM12_BASE)
496+
case (uint32_t)TIM12:
497+
IRQn = TIM12_IRQn;
498+
break;
499+
#endif
500+
#if defined(TIM13_BASE)
501+
case (uint32_t)TIM13:
502+
IRQn = TIM13_IRQn;
503+
break;
504+
#endif
505+
#if defined(TIM14_BASE)
506+
case (uint32_t)TIM14:
507+
IRQn = TIM14_IRQn;
508+
break;
509+
#endif
510+
#if defined(TIM15_BASE)
511+
case (uint32_t)TIM15:
512+
IRQn = TIM15_IRQn;
513+
break;
514+
#endif
515+
#if defined(TIM16_BASE)
516+
case (uint32_t)TIM16:
517+
IRQn = TIM16_IRQn;
518+
break;
519+
#endif
520+
#if defined(TIM17_BASE)
521+
case (uint32_t)TIM17:
522+
IRQn = TIM17_IRQn;
523+
break;
524+
#endif
525+
#if defined(TIM18_BASE)
526+
case (uint32_t)TIM18:
527+
IRQn = TIM18_IRQn;
528+
break;
529+
#endif
530+
#if defined(TIM19_BASE)
531+
case (uint32_t)TIM19:
532+
IRQn = TIM19_IRQn;
533+
break;
534+
#endif
535+
#if defined(TIM20_BASE)
536+
case (uint32_t)TIM20:
537+
IRQn = TIM20_IRQn;
538+
break;
539+
#endif
540+
#if defined(TIM21_BASE)
541+
case (uint32_t)TIM21:
542+
IRQn = TIM21_IRQn;
543+
break;
544+
#endif
545+
#if defined(TIM22_BASE)
546+
case (uint32_t)TIM22:
547+
IRQn = TIM22_IRQn;
548+
break;
549+
#endif
550+
break;
551+
default:
552+
printf("TIM: Unknown timer IRQn");
553+
break;
554+
}
555+
}
556+
return IRQn;
557+
}
558+
406559
/**
407560
* @brief This function will reset the timer
408561
* @param timer_id : timer_id_e
@@ -423,7 +576,7 @@ uint8_t getTimerClkSrc(TIM_TypeDef* tim)
423576
{
424577
uint8_t clkSrc = 0;
425578

426-
if(tim != (TimerMap *)NC)
579+
if(tim != (TIM_TypeDef *)NC)
427580
#ifdef STM32F0xx
428581
/* TIMx source CLK is PCKL1 */
429582
clkSrc = 1;
@@ -618,8 +771,8 @@ void TimerPulseInit(stimer_t *obj, uint16_t period, uint16_t pulseWidth, void (*
618771
sConfig.OCIdleState = TIM_OCIDLESTATE_RESET;
619772
sConfig.OCNIdleState = TIM_OCNIDLESTATE_RESET;
620773
#endif
621-
HAL_NVIC_SetPriority(timermap_irq(obj->timer, TimerMap_CONFIG), 14, 0);
622-
HAL_NVIC_EnableIRQ(timermap_irq(obj->timer, TimerMap_CONFIG));
774+
HAL_NVIC_SetPriority(getTimerIrq(obj->timer), 14, 0);
775+
HAL_NVIC_EnableIRQ(getTimerIrq(obj->timer));
623776

624777
if(HAL_TIM_OC_Init(handle) != HAL_OK) return;
625778

@@ -638,7 +791,7 @@ void TimerPulseDeinit(stimer_t *obj)
638791

639792
obj->irqHandleOC = NULL;
640793

641-
HAL_NVIC_DisableIRQ(timermap_irq(obj->timer, TimerMap_CONFIG));
794+
HAL_NVIC_DisableIRQ(getTimerIrq(obj->timer));
642795

643796
if(HAL_TIM_OC_DeInit(handle) != HAL_OK) return;
644797
if(HAL_TIM_OC_Stop_IT(handle, TIM_CHANNEL_1) != HAL_OK) return;

‎cores/arduino/stm32/timer.h

Lines changed: 78 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,83 @@ struct timer_s{
7575
/* Exported constants --------------------------------------------------------*/
7676
#define MAX_FREQ 65535
7777

78+
#if defined(TIM1_BASE) && !defined(TIM1_IRQn)
79+
#if defined(STM32F0xx)
80+
#define TIM1_IRQn TIM1_BRK_UP_TRG_COM_IRQn
81+
#elif defined(STM32F1xx) || defined(STM32F3xx) || defined(STM32L4xx)
82+
#define TIM1_IRQn TIM1_UP_TIM16_IRQn
83+
#elif defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32F7xx)
84+
#define TIM1_IRQn TIM1_UP_TIM10_IRQn
85+
#endif
86+
#endif
87+
#if defined(TIM6_BASE) && !defined(TIM6_IRQn)
88+
#if !defined(STM32F1xx) && !defined(STM32L1xx)
89+
#define TIM6_IRQn TIM6_DAC_IRQn
90+
#endif
91+
#endif
92+
#if defined(TIM8_BASE) && !defined(TIM8_IRQn)
93+
#if defined(STM32F1xx) || defined(STM32F2xx) ||defined(STM32F4xx) || defined(STM32F7xx)
94+
#define TIM8_IRQn TIM8_UP_TIM13_IRQn
95+
#elif defined(STM32F3xx) || defined(STM32L4xx)
96+
#define TIM8_IRQn TIM8_UP_IRQn
97+
#endif
98+
#endif
99+
#if defined(TIM9_BASE) && !defined(TIM9_IRQn)
100+
#if defined(STM32F1xx) || defined(STM32F2xx) ||defined(STM32F4xx) || defined(STM32F7xx)
101+
#define TIM9_IRQn TIM1_BRK_TIM9_IRQn
102+
#endif
103+
#endif
104+
#if defined(TIM10_BASE) && !defined(TIM10_IRQn)
105+
#if defined(STM32F1xx) || defined(STM32F2xx) ||defined(STM32F4xx) || defined(STM32F7xx)
106+
#define TIM10_IRQn TIM1_UP_TIM10_IRQn
107+
#endif
108+
#endif
109+
#if defined(TIM11_BASE) && !defined(TIM11_IRQn)
110+
#if defined(STM32F1xx) || defined(STM32F2xx) ||defined(STM32F4xx) || defined(STM32F7xx)
111+
#define TIM11_IRQn TIM1_TRG_COM_TIM11_IRQn
112+
#endif
113+
#endif
114+
#if defined(TIM12_BASE) && !defined(TIM12_IRQn)
115+
#if defined(STM32F1xx) || defined(STM32F2xx) ||defined(STM32F4xx) || defined(STM32F7xx)
116+
#define TIM12_IRQn TIM8_BRK_TIM12_IRQn
117+
#endif
118+
#endif
119+
#if defined(TIM13_BASE) && !defined(TIM13_IRQn)
120+
#if defined(STM32F1xx) || defined(STM32F2xx) ||defined(STM32F4xx) || defined(STM32F7xx)
121+
#define TIM13_IRQn TIM8_UP_TIM13_IRQn
122+
#endif
123+
#endif
124+
#if defined(TIM14_BASE) && !defined(TIM14_IRQn)
125+
#if defined(STM32F1xx) || defined(STM32F2xx) ||defined(STM32F4xx) || defined(STM32F7xx)
126+
#define TIM14_IRQn TIM8_TRG_COM_TIM14_IRQn
127+
#endif
128+
#endif
129+
#if defined(TIM15_BASE) && !defined(TIM15_IRQn)
130+
#if defined(STM32F3xx) || defined(STM32L4xx)
131+
#define TIM15_IRQn TIM1_BRK_TIM15_IRQn
132+
#endif
133+
#endif
134+
#if defined(TIM16_BASE) && !defined(TIM16_IRQn)
135+
#if defined(STM32F3xx) || defined(STM32L4xx)
136+
#define TIM16_IRQn TIM1_UP_TIM16_IRQn
137+
#endif
138+
#endif
139+
#if defined(TIM17_BASE) && !defined(TIM17_IRQn)
140+
#if defined(STM32F3xx) || defined(STM32L4xx)
141+
#define TIM17_IRQn TIM1_TRG_COM_TIM17_IRQn
142+
#endif
143+
#endif
144+
#if defined(TIM18_BASE) && !defined(TIM18_IRQn)
145+
#if defined(STM32F3xx)
146+
#define TIM18_IRQn TIM18_DAC2_IRQn
147+
#endif
148+
#endif
149+
#if defined(TIM20_BASE) && !defined(TIM20_IRQn)
150+
#if defined(STM32F3xx)
151+
#define TIM20_IRQn TIM20_UP_IRQn
152+
#endif
153+
#endif
154+
78155
/* Exported macro ------------------------------------------------------------*/
79156
/* Exported functions ------------------------------------------------------- */
80157

@@ -95,6 +172,7 @@ void setTimerCounter(stimer_t *obj, uint32_t value);
95172
void setCCRRegister(stimer_t *obj, uint32_t channel, uint32_t value);
96173
uint32_t getCCRRegister(stimer_t *obj, uint32_t channel);
97174

175+
uint32_t getTimerIrq(TIM_TypeDef* tim);
98176
uint8_t getTimerClkSrc(TIM_TypeDef* tim);
99177
uint32_t getTimerClkFreq(TIM_TypeDef* tim);
100178

‎variants/DISCO_F407VG/PeripheralPins.c

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -293,21 +293,3 @@ const PinMap PinMap_CAN_TD[] = {
293293
{PD1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
294294
{NC, NC, 0}
295295
};
296-
297-
const TimerMap TimerMap_CONFIG[] = {
298-
{TIM1, TIM1_UP_TIM10_IRQn},
299-
{TIM2, TIM2_IRQn},
300-
{TIM3, TIM3_IRQn},
301-
{TIM4, TIM4_IRQn},
302-
{TIM5, TIM5_IRQn},
303-
{TIM6, TIM6_DAC_IRQn},
304-
{TIM7, TIM7_IRQn},
305-
{TIM8, TIM8_UP_TIM13_IRQn},
306-
{TIM9, TIM1_BRK_TIM9_IRQn},
307-
{TIM10, TIM1_UP_TIM10_IRQn},
308-
{TIM11, TIM1_TRG_COM_TIM11_IRQn},
309-
{TIM12, TIM8_BRK_TIM12_IRQn},
310-
{TIM13, TIM8_UP_TIM13_IRQn},
311-
{TIM14, TIM8_TRG_COM_TIM14_IRQn},
312-
{NULL, 0}
313-
};

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