Add powerpc64 and mips32 architecture support #170
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This adds startup code for powerpc64le (ELF v2 ABI) and mipsel (O32 ABI).
Two new arch modules: powerpc64.rs and mips32.rs. Each one has the usual set: entry point, trap(), dynamic_table_addr(), relocation helpers, thread support, etc.
The tricky part on PowerPC64 is r2 (TOC pointer) setup. On ELF v2, r12 contains the entry point address at program start, and we need to compute r2 from it before touching any global/static data:
Without this, any access to static data gives EFAULT because r2 is garbage. Syscalls use the
scinstruction with error indicated by the cr0.SO flag (not negative return like x86).MIPS uses
__startas entry point (MIPS convention). The O32 ABI requires a 16-byte argument save area on the stack, and indirect jumps should go through$t9for PIC compatibility. Thread pointer is accessed via the userlocal register:rdhwr $3, $29.I tested with a minimal no_std binary that reads a static variable and exits with code 42. Both architectures work under QEMU user-mode.
I also tested with a larger application (kv) that does file I/O and string formatting. MIPS works fully including argument parsing. PowerPC64 works the same way except for an argv issue - as far as I can tell from various workarounds and debugging, it's the same correct behavior, but there's a QEMU user-mode bug that corrupts the argv array for non-glibc PPC64LE binaries. The argument strings are placed correctly in memory, but the pointer array has NULLs interleaved. This only affects QEMU emulation, not the origin code itself.