Fix some tests for armv7k

Author: aschwaighofer

test/IRGen/async/hop_to_executor.sil

@@ -14,14 +14,14 @@ import _Concurrency
 
 // CHECK-LABEL: define{{.*}} void @test_simple(
 // CHECK-SAME: ptr swiftasync %0, [[INT]] %1, [[INT]] %2)
-// CHECK: store ptr %0, ptr [[CTX_ADDR:%[0-9]+]], align 8
+// CHECK: store ptr %0, ptr [[CTX_ADDR:%[0-9]+]]
 // CHECK: [[RESUME:%[0-9]+]] = call ptr @llvm.coro.async.resume()
 // CHECK: call {{.*}} @llvm.coro.suspend.async{{.*}}(i32 0, ptr [[RESUME]], ptr @__swift_async_resume_get_context, ptr @test_simple.1, ptr [[RESUME]], [[INT]] %1, [[INT]] %2, ptr {{%[0-9]+}})
 // CHECK: [[RESUME_CTX:%[0-9]+]] = call ptr @__swift_async_resume_get_context(
-// CHECK: store ptr [[RESUME_CTX]], ptr [[CTX_ADDR]], align 8
-// CHECK: [[CTX:%[0-9+]+]] = load ptr, ptr [[CTX_ADDR]], align 8
+// CHECK: store ptr [[RESUME_CTX]], ptr [[CTX_ADDR]]
+// CHECK: [[CTX:%[0-9+]+]] = load ptr, ptr [[CTX_ADDR]]
 // CHECK: [[CONT_ADDR:%[0-9]+]] = getelementptr inbounds <{ ptr, ptr }>, ptr [[CTX]], i32 0, i32 1
-// CHECK: [[RET_CONTINUATION:%.*]] = load ptr, ptr [[CONT_ADDR]], align 8
+// CHECK: [[RET_CONTINUATION:%.*]] = load ptr, ptr [[CONT_ADDR]]
 // CHECK-arm64e:  [[T0:%.*]] = ptrtoint ptr [[RET_CONTINUATION]] to i64
 // CHECK-arm64e:  [[T1:%.*]] = call i64 @llvm.ptrauth.auth(i64 [[T0]]
 // CHECK-arm64e:  [[RET_CONTINUATION:%.*]] = inttoptr i64 [[T1]] to ptr

test/IRGen/boxed_existential.sil

@@ -26,7 +26,7 @@ entry(%x : $*T):
   // CHECK: [[ADDR:%.*]] = extractvalue { ptr, ptr } [[BOX_PAIR]], 1
   %b = alloc_existential_box $Error, $T
   %p = project_existential_box $T in %b : $Error
-  // CHECK: [[INITWITHTAKE:%.*]] = load ptr, ptr %5, align 8, !invariant.load
+  // CHECK: [[INITWITHTAKE:%.*]] = load ptr, ptr %5
   // CHECK: call ptr [[INITWITHTAKE]](ptr noalias [[ADDR]], ptr noalias %0, ptr %T)
   copy_addr [take] %x to [init] %p : $*T
   // CHECK: ret ptr [[BOX]]

test/IRGen/enum_resilience.swift

@@ -307,7 +307,7 @@ extension ResilientMultiPayloadGenericEnum {
 // CHECK-LABEL: define{{( dllexport)?}}{{( protected)?}} swiftcc void @"$s15enum_resilience39constructExhaustiveWithResilientMembers010resilient_A011SimpleShapeOyF"(ptr noalias nocapture sret({{.*}}) %0)
 // CHECK: [[T0:%.*]] = call swiftcc %swift.metadata_response @"$s16resilient_struct4SizeVMa"([[INT]] 0)
 // CHECK-NEXT: [[METADATA:%.*]] = extractvalue %swift.metadata_response [[T0]], 0
-// CHECK-NEXT: [[WITNESSTABLE_ADDR:%[0-9]+]] = getelementptr inbounds ptr, ptr [[METADATA]], i64 -1
+// CHECK-NEXT: [[WITNESSTABLE_ADDR:%[0-9]+]] = getelementptr inbounds ptr, ptr [[METADATA]], {{(i64|i32)}} -1
 // CHECK-NEXT: %.valueWitnesses = load ptr, ptr [[WITNESSTABLE_ADDR]]
 // CHECK-NEXT: [[WITNESS_ADDR:%[0-9]+]] = getelementptr inbounds ptr, ptr %.valueWitnesses, i32 7
 // CHECK-NEXT: [[WITNESS_FN:%[0-9]+]] = load ptr, ptr [[WITNESS_ADDR]]

test/IRGen/exclusivity.sil

@@ -26,7 +26,7 @@ bb0(%0 : $A):
   %4 = begin_access [read] [dynamic] %3 : $*Int
 
   // CHECK: [[T0:%.*]] = getelementptr inbounds [[INT:%TSi]], ptr %1, i32 0, i32 0
-  // CHECK: load i64, ptr [[T0]]
+  // CHECK: load {{(i64|i32)}}, ptr [[T0]]
   %5 = load %4 : $*Int
 
   // CHECK: call void @swift_endAccess(ptr [[SCRATCH0]])

test/IRGen/moveonly_split_module_source_deinit.swift

@@ -5,7 +5,7 @@
 
 // Make sure we call the deinit through the value witness table in the other module.
 
-// REFERRING_MODULE-LABEL: define {{.*}}swiftcc void @"$s6serverAAV4mainyyKFZ"(ptr swiftself %0, ptr noalias nocapture swifterror dereferenceable(8) %1) {{.*}}{
+// REFERRING_MODULE-LABEL: define {{.*}}swiftcc void @"$s6serverAAV4mainyyKFZ"(ptr swiftself %0, ptr noalias nocapture swifterror dereferenceable({{(8|4)}}) %1) {{.*}}{
 // REFERRING_MODULE: [[SERVER:%.*]] = alloca %T6server8MoveOnlyV
 // REFERRING_MODULE: [[VALUE_WITNESS_TABLE:%.*]] = getelementptr inbounds ptr, ptr %"$s6server8MoveOnlyVN.valueWitnesses"
 // REFERRING_MODULE: [[VALUE_WITNESS:%.*]] = load ptr, ptr [[VALUE_WITNESS_TABLE]]

test/IRGen/struct_layout.sil

@@ -11,9 +11,6 @@ import Swift
 // 64: @"$s4main14Rdar15410780_CVWV" = internal constant {{.*}} i64 16
 
 
-// 32: %T4main14Rdar15410780_AV = type <{ i2048, %Ts4Int8V }>
-// 32: %T4main14Rdar15410780_BV = type <{ %T4main14Rdar15410780_AVSg }>
-// 32: %T4main14Rdar15410780_AVSg = type <{ [257 x i8], [1 x i8] }>
 // 32: %T4main14Rdar15410780_CV = type <{ %TSSSg }>
 // 32: %TSSSg = type <{ [12 x i8] }>
 

test/IRGen/synthesized_conformance_future.swift

@@ -38,7 +38,7 @@ extension Nonfinal: Encodable where T: Encodable {}
 func doEquality<T: Equatable>(_: T) {}
 // CHECK-LABEL: define{{( dllexport| protected)?}} swiftcc void @"$s30synthesized_conformance_future8equalityyyF"()
 public func equality() {
-    // CHECK: [[TMP:%.*]] = alloca %TSi, align 8
+    // CHECK: [[TMP:%.*]] = alloca %TSi
     // CHECK: call swiftcc void @"$s30synthesized_conformance_future6StructV1xACyxGx_tcfC"(ptr noalias nocapture {{[^,]*}}, ptr noalias nocapture [[TMP]], ptr @"$sSiN")
     // CHECK: [[Struct_Equatable:%.*]] = call ptr @"$s30synthesized_conformance_future6StructVySiGACyxGSQAASQRzlWl"()
     // CHECK-NEXT: call swiftcc void @"$s30synthesized_conformance_future10doEqualityyyxSQRzlF"(

test/IRGen/typed_boxes.sil

@@ -38,7 +38,7 @@ sil @pod_box_32_16 : $@convention(thin) () -> () {
 entry:
   // CHECK: [[BOX:%.*]] = call noalias ptr @swift_allocObject(ptr {{.*}} [[POD_32_16_METADATA:@metadata[0-9.]*]], {{.*}} [[WORD]] 48, [[WORD]] 15)
   %a = alloc_box $<τ_0_0> { var τ_0_0 } <OverAligned>
-  // CHECK-32: [[BOX_DATA:%.*]] = getelementptr inbounds [[POD_32_16_LAYOUT:<\{ %swift.refcounted, \[32 x i8\] \}>]], ptr [[BOX]], i32 0, i32 1
+  // CHECK-32: [[BOX_DATA:%.*]] = getelementptr inbounds [[POD_32_16_LAYOUT:<\{ %swift.refcounted, \[8 x i8\], \[32 x i8\] \}>]], ptr [[BOX]], i32 0, i32 2
   %b = project_box %a : $<τ_0_0> { var τ_0_0 } <OverAligned>, 0
   // CHECK: call void @swift_deallocUninitializedObject(ptr [[BOX]], [[WORD]] 48, [[WORD]] 15)
   dealloc_box %a : $<τ_0_0> { var τ_0_0 } <OverAligned>