Skip to content

Commit b715d16

Browse files
committed
Simplify OP_trunc byte truncation in ARM and RISC-V codegen
- Remove unnecessary intermediate variable assignment in byte truncation
1 parent 1198080 commit b715d16

File tree

2 files changed

+2
-4
lines changed

2 files changed

+2
-4
lines changed

src/arm-codegen.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -440,8 +440,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
440440
return;
441441
case OP_trunc:
442442
if (rm == 1) {
443-
rm = 0xFF;
444-
emit(__and_i(__AL, rd, rn, rm));
443+
emit(__and_i(__AL, rd, rn, 0xFF));
445444
} else if (rm == 2) {
446445
emit(__sll_amt(__AL, 0, logic_ls, rd, rn, 16));
447446
emit(__sll_amt(__AL, 0, logic_rs, rd, rd, 16));

src/riscv-codegen.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -431,8 +431,7 @@ void emit_ph2_ir(ph2_ir_t *ph2_ir)
431431
return;
432432
case OP_trunc:
433433
if (ph2_ir->src1 == 1) {
434-
rs2 = 0xFF;
435-
emit(__andi(rd, rs1, rs2));
434+
emit(__andi(rd, rs1, 0xFF));
436435
} else if (ph2_ir->src1 == 2) {
437436
/* For short truncation,
438437
* use shift operations since 0xFFFF is too large

0 commit comments

Comments
 (0)