Introduce architecture-specific IR lowering stage #247
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This commit adds a clean separation between target-independent IR optimization and architecture-specific code generation by introducing an arch-lowering stage that runs after peephole optimization.
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This commit adds a clean separation between target-independent IR optimization and architecture-specific code generation by introducing an arch-lowering stage that runs after peephole optimization.
Summary by Bito
This pull request introduces a new architecture-specific IR lowering stage, enhancing the separation of target-independent optimizations from architecture-specific code generation. It adds ARM and RISC-V functions for branch detachment, simplifying code generation and updating the main code flow to apply optimizations before final generation.