5.Sigma‐Delta Modulator Implementation
The implementation of the Σ-Δ ADC within this SDR adopts a streamlined approach. Specifically, the system omits immediate filtering post one-bit data stream conversion. Instead, filtering processes are deferred until the signal is confined within the human audible frequency range. At the core of this configuration is a first-order sigma-delta modulator. The design strategically utilizes the LVDS input of the FPGA to minimize the reliance on analog components. For setups using a Lattice board, the utilization of LVDS input doesn't necessitate additional coding. It only requires specifying that the RF input signal is of LVDS type in the constraint file. Due to the high-frequency nature of the signals, testing with a breadboard is not advisable; breadboards might introduce uncertainties if they are defective. A prototype board or a custom PCB is recommended for more reliable and accurate testing.
Figure 1: Schematic for LVDS implementation of the Σ-Δ modulator.
Figure 1 shows the schematic for a PCB made in KiCAD for a first-order Σ-Δ modulator extension for the ULX3S board, so that there is no need for a prototype board or a breadboard model. The potentiometer RV1 on the schematic is used to tune the RC integrator constant that depends on the oversampling frequency of the modulator. Jumper J3 is used so that adding additional capacitors in parallel is made easier, and the jumper J2 is used to short-circuit the input capacitance if needed.
Figure 2: PCB Layout for Single-Layer LVDS Implementation of Σ-Δ modulator.
Figure 2 represents the PCB layout of the aforementioned schematic from the last figure. The board is one-layer, bottom copper, shown with the blue traces.
Figure 3: 3D View for Single-Layer LVDS Implementation of Σ-Δ modulator.
In Figure 3, a top-down 3D view of the PCB is presented. It is an extension that can be plugged directly into the side of the ULX3S FPGA board.
A two-layer board was also implemented that uses the Digilent PMOD standard of using 2x6 pins so that it can be used on any board, not just ULX3S. This makes the First Order Σ-Δ modulator PCB more versatile, usable on different FPGA boards with PMOD extensions. The bottom copper layer is entirely the ground plane, while the top layer consists of the signal traces and the 3.3V traces. This board is a bit harder to design by hand or in the lab, but can be easily manufactured when ordered online.
The schematic is identical to the one already presented in Figure 1, so it won't be shown. The PCB layout can be seen in Figure 4, where the blue plane is the ground plane, and the red traces are the signal traces.
Figure 4: PCB Layout for Two-Layer LVDS Implementation of Σ-Δ modulator.
Figure 5 shows the top-down 3D view of the Two-Layer PCB board.
Figure 5: 3D View for Two-Layer LVDS Implementation of Σ-Δ modulator.
If the LVDS on the FPGA board is not sensitive or precise enough, an external comparator can be used. For this comparison, an operational amplifier is used. In this case, the input pin on the FPGA would be LVCMOS33 and not LVDS. The schematic for such a circuit is shown in Figure 6. The OP-AMP used is the TL072 dual OP-AMP. After using it as a proof of concept on a breadboard, the sound can be heard, but for better audio quality, a higher-bandwidth OP-AMP should be used.
Figure 6: Schematic for OP-AMP Implementation of Σ-Δ modulator.
In Figure 7, the PCB Layout is presented. The PCB is Single-Layer with bottom copper lines. For a Two-Layer PCB board with a PMOD standard like the one presented above, a 3.3V to 5V converter would need to be used because the Digilent PMOD standard uses 3.3V as the VCC and the TL072 IC uses 5V minimum.
Figure 7: PCB Layout for OP-AMP Implementation of Σ-Δ modulator.
The 3D top-down view of the PCB is shown in Figure 8.
Figure 8: 3D View for OP-AMP Implementation of Σ-Δ modulator.