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gautierg-stcarlescufi
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dts: arm: st: add default clock source for asynchronous ADC
For STM32L1, U5 and WBA, the ADC always uses an asynchronous clock source, so we add the default clock source in the clock node. Signed-off-by: Guillaume Gautier <[email protected]>
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4 files changed

+10
-5
lines changed

4 files changed

+10
-5
lines changed

dts/arm/st/l1/stm32l1.dtsi

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -216,7 +216,8 @@
216216
adc1: adc@40012400 {
217217
compatible = "st,stm32f4-adc", "st,stm32-adc";
218218
reg = <0x40012400 0x400>;
219-
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000200>;
219+
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000200>,
220+
<&rcc STM32_SRC_HSI NO_SEL>;
220221
interrupts = <18 0>;
221222
status = "disabled";
222223
#io-channel-cells = <1>;

dts/arm/st/u5/stm32u5.dtsi

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -781,7 +781,8 @@
781781
adc1: adc@42028000 {
782782
compatible = "st,stm32-adc";
783783
reg = <0x42028000 0x400>;
784-
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000400>;
784+
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000400>,
785+
<&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
785786
interrupts = <37 0>;
786787
status = "disabled";
787788
#io-channel-cells = <1>;
@@ -797,7 +798,8 @@
797798
adc4: adc@46021000 {
798799
compatible = "st,stm32-adc";
799800
reg = <0x46021000 0x400>;
800-
clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x00000020>;
801+
clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x00000020>,
802+
<&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
801803
interrupts = <113 0>;
802804
status = "disabled";
803805
#io-channel-cells = <1>;

dts/arm/st/u5/stm32u595.dtsi

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,8 @@
6464
adc2: adc@42028100 {
6565
compatible = "st,stm32-adc";
6666
reg = <0x42028100 0x400>;
67-
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000400>;
67+
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000400>,
68+
<&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
6869
interrupts = <37 0>;
6970
status = "disabled";
7071
#io-channel-cells = <1>;

dts/arm/st/wba/stm32wba.dtsi

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -413,7 +413,8 @@
413413
adc4: adc@46021000 {
414414
compatible = "st,stm32-adc";
415415
reg = <0x46021000 0x400>;
416-
clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000020>;
416+
clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000020>,
417+
<&rcc STM32_SRC_HCLK1 ADC_SEL(0)>;
417418
interrupts = <65 0>;
418419
status = "disabled";
419420
#io-channel-cells = <1>;

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