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17 changes: 17 additions & 0 deletions boards/st/stm32h7s78_dk/stm32h7s78_dk.dts
Original file line number Diff line number Diff line change
Expand Up @@ -171,6 +171,23 @@
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";

audio_codec: wm8904g@1a {
compatible = "wolfson,wm8904";
reg = <0x1a>;
};
};

&gpdma1 {
status = "okay";
};

&i2s6 {
mck-enabled;
pinctrl-0 = <&i2s6_mck_pa3 &i2s6_ws_pa4 &i2s6_ck_pa5 &spi6_mosi_pb5 &spi6_miso_pg12>;
pinctrl-names = "default";
status = "okay";
};

&die_temp {
Expand Down
28 changes: 28 additions & 0 deletions dts/arm/st/h7rs/stm32h7rs.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
#include <zephyr/dt-bindings/adc/adc.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
#include <zephyr/dt-bindings/dma/stm32_dma.h>
#include <freq.h>

/*
Expand Down Expand Up @@ -326,6 +327,19 @@
};
};

gpdma1: dma@40021000 {
compatible = "st,stm32u5-dma";
reg = <0x40021000 0x1000>;
#dma-cells = <3>;
clocks = <&rcc STM32_CLOCK(AHB1, 4)>;
interrupts = <39 0 40 0 41 0 42 0 43 0 44 0 45 0 46 0
133 0 134 0 135 0 136 0 137 0 138 0 139 0 140 0>;
dma-channels = <16>;
dma-requests = <110>;
dma-offset = <0>;
status = "disabled";
};

usart1: serial@42001000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x42001000 0x400>;
Expand Down Expand Up @@ -492,6 +506,20 @@
status = "disabled";
};

i2s6: i2s@58001400 {
compatible = "st,stm32h7-i2s", "st,stm32-i2s";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x58001400 0x400>;
clocks = <&rcc STM32_CLOCK(APB4, 5U)>,
<&rcc STM32_CLOCK_BUS_APB4 SPI6_SEL(0)>;
interrupts = <63 3>;
dmas = <&gpdma1 0 62 (STM32_DMA_PERIPH_TX | STM32_DMA_16BITS | STM32_DMA_PRIORITY_HIGH)
&gpdma1 1 61 (STM32_DMA_PERIPH_RX | STM32_DMA_16BITS | STM32_DMA_PRIORITY_HIGH)>;
dma-names = "tx", "rx";
status = "disabled";
};

iwdg: iwdg1: watchdog@58004800 {
compatible = "st,stm32-watchdog";
reg = <0x58004800 0x400>;
Expand Down