Z8 Softcore

The project is about implementing a Zilog Z8 microcontroller in Verilog.

So far it already can run the Tiny computer:

on a Tang Tano 9k:

State of the Z8 Softcore

• implement all operations
  • nop
  • carry-flag manipulation operations
  • srp #IM
  • single-register ALU operations
    • xxx R
    • xxx IR
    • inc r
  • dual-register ALU operations
    • xxx r, r
    • xxx r, Ir
    • xxx R, R
    • xxx R, IR
    • xxx R, #IM
    • xxx IR, #IM
  • load operations
    • ld r, #IM
    • ld r, R
    • ld R, r
    • ld r, Ir
    • ld Ir, r
    • ld R, R
    • ld R, IR
    • ld IR, R
    • ld R, #IM
    • ld IR, #IM
    • ld r, r(x)
    • ld r(x), r
  • control flow operations
    • djnz r, RA
    • jr cc, RA
    • jp cc, DA
    • jp IRR
  • di, ei (disable/enable interrupt)
  • memory operations
    • ldc r, Irr
    • ldc Irr, r
    • ldci Ir, Irr
    • ldci Irr, Ir
    • let lde/ldei work the same as ldc/ldci
  • stack operations
    • internal stack
      • pop R
      • pop IR
      • push R
      • push IR
      • call IRR
      • call DA
      • ret
      • iret
    • external stack
  • illegal instruction handling (stop at that address)
• port 2
  • input
  • output
• port 3
  • P30-P33 generic input
  • P34-P37 generic output
  • special counter/serial input/output
• Timers/Counters
  • basics
  • special external modes
  • UART
    • basics
    • parity handling
• interrupt handling
  • basics (launching the right interrupt)
  • handle priorities