v0.8.0 release

Evolution summary:

core:

new

• part: add map manufacturer id <-> name
• jtag: adding method to inject device into active device list
• ftdi MPSSE / jtag: add option to use neg edge for TDO's sampling
• xilinx: adding zynqmp support and a method to init this family of devices

update

• jtag: better display for unknown IDCODE
• jtag: improving jtag chain detection: now searching for masked and unmasked idcode
• display: use a less dark blue
• Nicer layout for the boards/fpga/cables table
• main: bitstream default target depends on mode spi/jtag

fix

• ftdiJtagMPSSE: fix read/write polarity: always write on neg, read is by default on pos but may on neg with arty
• Darwin cmake config is missing Security framework
• ftdiJtagMPSSE,ftdipp_mpsse: fix verbose level -> must be an int8_t not uint8_t
• jtag: fix shiftIR: bypass_after must be computed in all case

cable

new

• digilent jtag-smt2-nc
• Olimex ARM-USB-OCD-H
• SEGGER J-Link

board

new

• alinx AXU2CGA
• Xilinx AC701 development kit
• Xilinx/TUL PYNQ-Z2
• Xilinx Zynq-7000 SoC ZC702 Evaluation Kit
• Xilinx Zynq-7000 SoC ZC706 Evaluation Kit
• Xilinx ZynqMPSoC ZCU102 Evaluation Kit
• CERN SPEC150
• colorlight-i9
• digilent genesys2
• digilent zybo_z7 10/20
• QMTech qmtechCycloneV_5cefa5f23 board
• QMTech Kintex7 Core Board
• sipeed tangnano1k
• sipeed tangnano9k
• Terasic DE1-SoC board

part

new

• Xilinx Spartan6 xc6slx150T
• Xilinx Kintex 160T
• Xilinx Zynq XC7Z045
• Xilinx ZynqMPSoC XCZU2CG
• Xilinx ZynqMPSoC XCZU9EG
• Gowin GW1NZ-1
• Gowin GW1NR-9C
• Altera CycloneV 5CEFA5
• Altera CycloneV SoC 5CSEMA5

update

• ice40: add CRAM support

fix

• ice40: Add override specifier to resolve compiler warnings

spiFlash

new

• Spansion S25FL256S
• Spansion S25FL256L
• Microchip SST26VF032B

update

• spiFlash: add no block protect use case

fix

• spiFlash: when no subsector_erase compute end_addr with correct block size
• spiFlashdb: fix bp_offset list
• spiFlash: force subsector only for SST26VF032B
• spiFlash: fix overflow test (#172)

spiOverJtag

new

• Xilinx spartan6 FTG 256 ucf
• Xilinx spartan6 LX16 FTG256
• Xilinx spartan6 LX16 CSG324
• Xilinx Spartan6 LX150T
• add spiOverJtag build process for Kintex7 ffg900-2 packages, amend and extend build process for ff676-1 package
• Add spiOverJtag support for Xilinx xc7k325tffg676 part.
• spiOverJtag/spiOverJtag_5cefa5f23.rbf.gz bitstream to write flash

update

• compress the kintex7 bitstreams

CI

new

• add CI for macOS
• use reusable composite action and reusable workflow from msys2/setup-msys2

fix

• fix msys2 build failure
• fix step 'Show package content'

doc

new

• FPGAs: ice40 memory support
• cable: move to yml
• declare board compatibility through a YAML file
• declare FPGA compatibility list through YAML file
• conf: add intersphinx mapping 'constraints'
• cross-reference FPGA compatibility table and vendor notes
• boards: iCE40UP5K-B-EVN
• cable: RV-Debugger-BL702

update

• board: add field 'Constraints'
• install.rst
• boards: iCE40-HX8K: memory ok

fix

• debian command

Contributors

• Dave Berkeley (@DaveBerkeley)
• Fabien Marteau (@Martoni)
• Hansem Ro (@hansemro)
• Hirosh Dabui (@splinedrive)
• Icenowy Zheng (@Icenowy)
• Jean THOMAS (@jeanthom)
• Jonathan Kimmitt (@jrrk2)
• Karol Gugala (@kgugala)
• Pepijn de Vos (@pepijndevos)
• @RGD2
• Rod Whitby (@rwhitby)
• Stephan Ruloff (@rstephan)
• Stephane Chevigny (@infphyny)
• Tarik Graba (@tarikgraba)
• Torsten Reuschel (@unbtorsten)
• Unai Martinez-Corral (@umarcor)
• Verneri Hirvonen (@chiplet)

v0.7.0 release

Evolution summary:

core

• main: add protection for all devices. Add CLI args
• main: fix SPI access

cables

update

• dfu: add debug level, only print device open fails in debug mode

fix

• jtag: ckeck highest nibble to prevent confusion between Cologne Chip GateMate and Efinix Trion T4/T8 devices
• dfu: fix memory leak
• dfu: check libusb_open return value in searchDFUDevices
• dfu: when libusb_open fails: skip device instead of error and stop
• dfu: force USB reset when download end in DFUIdle state
• dfu: don't check filename -> let configBitstreamParser to do check

parts

new

• Anlogic ELF2 EF2M45 support
• colognechip GateMate: new vendor/device
• all devices: add support to (un)protect flash, implement pre/post flash access
• use new spiInterface methods
• zynq xc7z010 support
• arty A7 100t support

update

• xilinx: use gz file by default

fix

• ice40: flash reset powerup are done into spiFlash
• efinix/titanium: add missing JTAG idcode

update

• device.hpp: add (un)protect flash methods

boards

• ulx3s_dfu
• digilent add arty S7 50
• Digilent arty s7 25
• digilent arty_z7 10/20 support
• Titanium Ti60 f225 dev kit

spi flash

new

• windbond w25q devices
• micron N25Q32
• spansion S25FL 064P/128P
• no more bypass flash protection: if protection, user has to agree.
• (un)protect flash support
• add common method to (un)protect, write and dump SPI flash content
• conf register for tb

fix

• fix tb_offset for ISSI devices
• (un)protect flash, and generic pre/post flash access methods
• spiFlash: enable/disable protection. now handle correctly device with protection enabled

spiOverJtag

new

• add xc7s25csga324 support
• add xc7a100tcsg324 support
• gzip xilinx bitstream

update

• constr_xc7a_csg324: enable compression
• constr_xc7s_csg324: enable compression

fix

• spiOverJtag_xc7a100tcsg324 compress
• spiOverJtag_xc7s50csga324: compress

documentation

new

• colognechip: vendor documentation

update

• doc/guide/install: archlinux: list required libraries to build from source

fix

• doc: fpga: fix anlogic AS -> OK

Contributors

• Franck Jullien (@fjullien)
• Icenowy Zheng (@Icenowy)
• Patrick Urban (@pu-cc)
• uis (@uis246)
• emard (@emard)
• Unai Martinez-Corral (@umarcor)

v0.6.1 release

Minor release

core

• fix version number
• zlib or zlib-ng are now required

CI

• update action for windows
• replace openFPGALoader-Documentation subdir with a tarball

files

• add zlib-ng as possible decompress library if zlib not found.

Contributors

• Jean THOMAS (@jeanthom)
• Unai Martinez-Corral (@umarcor)

v0.6.0 release

Evolution summary:

Note

• libhid-raw is the prefered library (libhid-libusb is used for backward
  compatibility)
• zlib is required to uncompress spiOverJtag's rbf files

core

new

• vid/pid args
• verbose-level arg: -1 quiet, 0 normal mode, 1 verbose, 2 debug lowlevel
• external-flash option (Gowin devices)
• altsetting (DFU)

update

• device: if filename has no extension -> use raw type
• set USEUDEV=OFF by default for windows builds
• mask idcode upper nibble (version in IEEE 1149.1)

fix

• detect display order
• progressBar: use only stdout.
• main: fix comments for load and write bitstream
• main: don't limit vid/pid to dfu
• main: raise error when board name is provided but not found

cable

new

• ch552_jtag: driver for ch552_jtag firmware (ft2232c clone)
• DFU: filter to select altsetting interface

update

• jtag: add access to target idcode
• ftdiJtagMPSSE: improve USB transaction
• writeTMS: len int -> uint32_t
• cmsisDAP: try libhidapi-hidraw, or libhidapi-libusb for backward compatibility
• cmsisDAP: send disconnect after use
• cmsisDAP: close device and context after use/ when fail

fix

• ftdipp_mpsse: typo in setClkFreq
• ftdiJtagMPSSE: Fix TCK toggle for large numbers.
• cmsisDAP: fix buffer length
• ch552_jtag: fix buffer flush with previous libftdi version
• jtag: fix idcode mask and display

parts

new

• GW1NSR-4C
• XC95 CPLD family
• spartan3
• XCF flash
• Coolrunner-II support
• gowin external spi in bscan
• MachXO3D
• efinix: jtag support

update

• altera: EP3C16 and EP4CE15 have same idcode
• xilinx: Adapt wait times with JTAG frequency.
• lattice: merge ECP5-12 & ECP5-25 (same idcode)
• lattice: machXO3D pubkey programming and authentification mode
• lattice: check matching idcode between bitstream and FPGA

fix

• lattice: throw exception when program fails
• lattice: if unknown file type, fails only for SRAM
• lattice: fix REG_STATUS_CNF_CHK_MASK offset: not the same for machXO3D and others
• xilinx: with XCF reconfigure FPGA after write
• xilinx: Fix wrong description of XC95288XL

files

new

• xilinxMapParser: fuse mapping for xc2c jed
• add gzip support

update

• jedParser: add xilinx compatibility
• fsparser: gw1nsr-4c idcode/nb_line
• check if it's a compressed file -> extract real extension
• xilinx: test parse return for jedec instead of catch exception
• latticeBitParser: extract FPGA idcode from configuration data

fix

• jedParser: fix checksum for xc9500
• jedParser: fix checksum when configuration data size is not multiple of 8bits
• latticeBitParser: fix loop type

boards

new

• Alhambra II
• Sipeed Tang Nano 4K kit
• Efinix Trion T120 BGA 576 Dev Kit
• 1bitsquared iCEBreaker-bitsy
• QMTECH Cyclone IV Core Board

update

• Xyloni JTAG interface
• oe_pin in board configuration
• board: force 0 for altsetting in non-DFU type
• dfu: throw exception when vid & pid == 0

spiOverJtag

new

• 5CEBA4F23C8
• 5CEBA4F43C8
• ECP4CE15F23

update

• compress rbf file

fix

• fix sdc file

spi Flash

new

• introduce list of known spi flash devices (required for protection)
• add flash_model, method to convert len to block protect and block protect to len
• enable_protection method
• erase using 4 or 64Kb

update

• extract status register display from read_status_reg

fix

• workaround for dump > 1M
• fix len_to_bp mask

documentation

• Rework project documentation
• add Sphinx site
• convert from md to rst
• ci: use BuildTheDocs
• add shields/badges
• retrieve username from $USER

Contributors

• Dominik Wernberger (@Werni2A)
• Fabien Marteau (@Martoni)
• Florent Kermarrec (@enjoy-digital)
• Jean THOMAS (@jeanthom)
• Uwe Bonnes (@UweBonnes)
• Vegard Storheil Eriksen (@zyp)
• Martin Beynon (@abacomartin)
• emard (@emard):
• Unai Martinez-Corral (@umarcor)
• wuhanstudio (@wuhanstudio)

v0.5.0 release

Evolution summary:

core

new

• CI builder (windows and Linux)
• release artifacts
• spiOverJtag: altera version (virtual jtag)

update

• better list of boards and FPGA
• spiOverJtag: build system now based on edalize
• spiOverJtag: rewrite xilinx spiOverJtag vhd -> v
• spiOverJtag: use build.py for all devices, add xc6slx45
• epcq,spiFlash: epcq is now a subclass of spiFlash
• spiFlash: add verify and dump method

fix

• main: display error message if program fails
• configBitstreamParser: don't compute reverseByte, use a precomputed table: gain: 200ms for arty @30mhz
• progressBar: limit resolution

cable

update

• DFU: try to open dfu file VID/PID. If fails try with constructor VID/PID.

fix

• DFU: don't try to autodetect target to use
• ftdxxx: workaround for arty to program at 30MHz

parts

new

• Xilinx Spartan6 xc6slx100fgg484
• Gowin GW1N-2

update

• altera: use new epcq interface, add device type and prog type. Now more generic and not specific to cyc1000
• altera: add spi flash support for cyclone IV & cyclone V

boards

new

• Fomu support
• default clock speed in board configuration
• add VID/PID at board configuration level

update

• cyc1000: add fpga model and spi flash support
• Arty set default clock speed @ 10MHz
• de0nano: add fpga model and spi flash support
• qmTech: add fpga model and spi flash support
• pipistrello: add fpga mode and spi flash support

Contributors:

• Billy Stevens (@wasv):
• ultraembedded (@ultraembedded)
• Unai Martinez-Corral (@umarcor)

v0.4.0 release

Evolution summary:

core

update

• LICENSE: now APACHE 2.0

cable

new

• Orbtrace

parts

update

• gowin: checks if fs is targeted for the connected device
• xilinx, lattice, efinix: add verify write to flash
• xilinx, lattice, efinix, ice40: add option to dump flash area

fix

• ftdi: with libftdi >= 1.5 reattach hack is no more required

Contributors:

• Vegard Storheil Eriksen (@zyp)

v0.3.0 release

Evolution summary:

core

new

• main: add optional probe-firmware
• main: add option to specify device index
• part: add irlength and introduce new structure for device not handled (CPU) mainly for irlength
• jtag: add logic to handle multiple device in JTAG chain

update

• spiFlash: introduce jedec_id
• main: rework fpga detection to allows more than one device in a chain, but only FPGA is allowed

fix

• spiFlash: add a workaround for microchip SST26VF032B / SST26VF032BA
• main: fix default args.index_chain

cable

new

• Digilent Digital Discovery and Analog Discovery 2
• cmsis dap (hid) support
• cypress fx2 low level
• DFU protocol support
• usb-blasterII

update

• usbBlaster: add a low level to support both usbBlasterI(ftdi) and usbBlasterII(fx2)
• dirtyJtag: optimizations to cut the number of USB requests

fix

• allow 232H devices to have upper bank pins configured on init.

boards

new

• Alchitry Au
• basys3
• colorlight I5
• digilent zedboard
• minispartan6
• orangeCrab
• terasic de0nanoSoc
• terasic de10nano

parts

new

• intel cycloneV Soc 5CSEMA4, 5CSEBA6
• lattice MachXO2 LCMXO2-1200HC
• xilinx artix 7 75t
• xilinx spartan6 xc6slx9, xc6slx16, xc6slx25
• xilinx zynq 7020

update

• lattice: move directly to run_test_idle with last tx packet
• rework xilinx fpga spiOverJtag to respect model/package
• altera: adapt delay according to clock freq

fix

• xilinx: be more verbose when spiOverJtag not available
• xilinx: supress useless test in spi_wait

bitstream/file type

new

• ihexParser

fix

• fsparser: fix checksum with GW1NS-2C, when configuration data is smaller than theory
• fsparser: don't try to analyze header after then end of header area
• fsparser: drop CR at the end of line
• configBitstreamParser: fix CRLF vs LF: use fread with FILE (or stdin) instead of c++ stream

Contributors:

• GEORGIOS KARNAS (@kargeor)
• phdussud (@phdussud)
• ultraembedded (@ultraembedded)

v0.2.6 release

Evolutions summary:

core

new

• CLI argument to bypass file type autodetection
• add pipe (stdin) support

fix

• progressBar: use chrono instead of clock
• main: fix bitbang check: config pins must be the shift value

cable

new

• DirtyJtag2
• SecuringHardware Tigard programmer

update

• drop divide_by_5 param
• add links for honeycomb adapter
• add links for tangNano adapter

fix

• fix purge buffer fix libftdi >= 1.5

boards

new

• honeycomb board
• kc705 dev kit
• Terasic DE0 board
• iCE40HX8K-EVB.

update

• TEC0117 can be flashed in memory and flash

fix

• README: updated pinout for direct SPI mode on iCE40HXXK-EVB

parts

new

• xilinx kintex xc7k325t
• altera cycloneIII
• altera cyclone V 5CEBA4
• Gowin GW1NS-2C

update

• lattice: drop the limitation, for .bin, to write at offset > 0

bitstream

update

• all parser: _raw_data is now filled in configBitstreamParser
• displayHeader: become a common method (configBitstreamParser)
• improve/rewrite some parser (efinixHexparser 1s -> 11ms)
• configBitstreamParser: add support to read data from stdin
• bitparser: drop garbage characters, use _hdr, best header parsing and display

Contributors:

• emard (@emard):
• Fabien Marteau (@Martoni)
• Giuseppe Gebbia (@gpgb)
• Gustavo Buzogany Eboli (@gbuzogany)
• Gwenhael Goavec-Merou (@trabucayre)
• phdussud (@phdussud)
• Vadim Kaushan (@Disasm)

v0.2.5 release

Evolutions summary:

core

• limit the progressBar update rate to 5 per second. This speeds up loading of small bin files.
• cable: always display real used frequency
• recast verbose to int8_t to have more level of verbosity (-1 quiet, 0 normal, 1 verbose), add --quiet option, display progress bar when verbosity level >= 0
• main: catch exception if FPGA can't be claimed.
• display: add warning message
• ftdipp_mpsse: don't configures high bytes for devices with only one bank per channel

boards

• efinix Xyloni
• seeedstudio runber (gowin GW1N-4)
• board: add entry for tec0117 (alias for Trenz littleBee)

filetype

• configBitstreamParser: introduce a buffer for unprocessed file content, external access to header keys/values
• anlogicBitParser, efinixHexParser: use _raw_data and work with this one instead of file descriptor
• dfuFileParser: parser for bitstream with DFU suffix
• svf_jtag: suppress CR when file is in DOS format
• rawParser: use raw_data buffer
• fsparser: rewrite to use header instead of comments, add support for
  compressed bitstream, display warning message for missing or unknown idcode, add missing GW1N-4(ES) idcode

parts

• xilinx: allow bin file to memory

doc

• update xilinx section
• add note for default behavior (memory/flash) and offset option

contributors

• Gwenhael Goavec-Merou (@trabucayre)
• phdussud (@phdussud)

v0.2.1 release

Minor release

core

• fix error messages with gcc 10.2
• fix version number

boards

• Acorn CLE215+
• Faiwaves XTRX

parts

• xilinx: drop offset check with raw binary

contributors

• Gwenhael Goavec-Merou (@trabucayre)
• phdussud (@phdussud)