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VHDL helper library with generic components and helper functions

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Name		Name	Last commit message	Last commit date
Latest commit History 10 Commits
AXI4StreamDataWidthComverters		AXI4StreamDataWidthComverters
AXI4StreamFifoSimple		AXI4StreamFifoSimple
AXI4StreamRegisterInterfaces		AXI4StreamRegisterInterfaces
helpers		helpers
.gitignore		.gitignore
README.txt		README.txt

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MSDLib - generic VHDL helper components
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Goal of this library is to provide an open-source collection of very basic hardware units that may be used by everyone in his / her project.

This library is developed and maintained by the Microelectronic Systems Design Research Group at the University of Kaiserslautern (http://ems.eit.uni-kl.de). Contributions (code, remarks, bug reports) are always welcome, please contact one of the staff members.

Main people to contact:
Christian de Schryver <[email protected]>
Philipp Schläfer <[email protected]>