tests/multi_extmod: Improve I2CTarget test.

Signed-off-by: Damien George <[email protected]>

Author: dpgeorge

tests/multi_extmod/machine_i2c_target.py

@@ -6,14 +6,13 @@
 
 import time
 from machine import I2C, I2CTarget
-import machine
 
 ADDR = 67
 
 
 # I2C controller
 def instance0():
-    i2c = machine.I2C("Y")
+    i2c = I2C("Y")
 
     multitest.next()
     multitest.wait("target stage 1")
@@ -26,20 +25,24 @@ def instance0():
 
 
 def irq(i2c_target):
-    print(i2c_target.irq().flags())
+    flags = i2c_target.irq().flags()
+    if flags & I2CTarget.IRQ_ADDR_MATCH_READ:
+        print("IRQ_ADDR_MATCH_READ")
+    if flags & I2CTarget.IRQ_ADDR_MATCH_WRITE:
+        print("IRQ_ADDR_MATCH_WRITE")
     time.sleep_us(100)
 
 
 # I2C target
 def instance1():
     buf = bytearray(8)
-    i2c_target = machine.I2CTarget(0, ADDR, scl=9, sda=8, mem=buf)
-    i2c_target.irq(irq, I2CTarget.IRQ_ADDR_MATCH, hard=True)
+    i2c_target = I2CTarget(0, ADDR, scl=9, sda=8, mem=buf)
+    i2c_target.irq(irq, I2CTarget.IRQ_ADDR_MATCH_READ | I2CTarget.IRQ_ADDR_MATCH_WRITE, hard=True)
 
     multitest.next()
     multitest.broadcast("target stage 1")
     multitest.wait("controller stage 2")
     print(buf)
     multitest.broadcast("target stage 3")
     multitest.wait("controller stage 4")
-    print('done')
+    print("done")

tests/multi_extmod/machine_i2c_target.py.exp

@@ -1 +1,8 @@
-#
+--- instance0 ---
+b'abcdefgh'
+--- instance1 ---
+IRQ_ADDR_MATCH_WRITE
+bytearray(b'abcdefgh')
+IRQ_ADDR_MATCH_WRITE
+IRQ_ADDR_MATCH_READ
+done