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feat!: update S390X to 5.1.0
1 parent 20ad653 commit cd7a831

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9 files changed

+27
-135
lines changed

9 files changed

+27
-135
lines changed

‎qemu/target/s390x/cpu_features_def.inc.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -107,6 +107,7 @@ DEF_FEAT(DEFLATE_BASE, "deflate-base", STFL, 151, "Deflate-conversion facility (
107107
DEF_FEAT(VECTOR_PACKED_DECIMAL_ENH, "vxpdeh", STFL, 152, "Vector-Packed-Decimal-Enhancement Facility")
108108
DEF_FEAT(MSA_EXT_9, "msa9-base", STFL, 155, "Message-security-assist-extension-9 facility (excluding subfunctions)")
109109
DEF_FEAT(ETOKEN, "etoken", STFL, 156, "Etoken facility")
110+
DEF_FEAT(UNPACK, "unpack", STFL, 161, "Unpack facility")
110111

111112
/* Features exposed via SCLP SCCB Byte 80 - 98 (bit numbers relative to byte-80) */
112113
DEF_FEAT(SIE_GSLS, "gsls", SCLP_CONF_CHAR, 40, "SIE: Guest-storage-limit-suppression facility")
@@ -310,7 +311,7 @@ DEF_FEAT(PCC_CMAC_ETDEA_192, "pcc-cmac-etdea-128", PCC, 10, "PCC Compute-Last-Bl
310311
DEF_FEAT(PCC_CMAC_TDEA, "pcc-cmac-etdea-192", PCC, 11, "PCC Compute-Last-Block-CMAC-Using-EncryptedTDEA-192")
311312
DEF_FEAT(PCC_CMAC_AES_128, "pcc-cmac-aes-128", PCC, 18, "PCC Compute-Last-Block-CMAC-Using-AES-128")
312313
DEF_FEAT(PCC_CMAC_AES_192, "pcc-cmac-aes-192", PCC, 19, "PCC Compute-Last-Block-CMAC-Using-AES-192")
313-
DEF_FEAT(PCC_CMAC_AES_256, "pcc-cmac-eaes-256", PCC, 20, "PCC Compute-Last-Block-CMAC-Using-AES-256")
314+
DEF_FEAT(PCC_CMAC_AES_256, "pcc-cmac-aes-256", PCC, 20, "PCC Compute-Last-Block-CMAC-Using-AES-256")
314315
DEF_FEAT(PCC_CMAC_EAES_128, "pcc-cmac-eaes-128", PCC, 26, "PCC Compute-Last-Block-CMAC-Using-Encrypted-AES-128")
315316
DEF_FEAT(PCC_CMAC_EAES_192, "pcc-cmac-eaes-192", PCC, 27, "PCC Compute-Last-Block-CMAC-Using-Encrypted-AES-192")
316317
DEF_FEAT(PCC_CMAC_EAES_256, "pcc-cmac-eaes-256", PCC, 28, "PCC Compute-Last-Block-CMAC-Using-Encrypted-AES-256")

‎qemu/target/s390x/gen-features.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -562,6 +562,7 @@ static uint16_t full_GEN15_GA1[] = {
562562
S390_FEAT_GROUP_MSA_EXT_9,
563563
S390_FEAT_GROUP_MSA_EXT_9_PCKMO,
564564
S390_FEAT_ETOKEN,
565+
S390_FEAT_UNPACK,
565566
};
566567

567568
/* Default features (in order of release)

‎qemu/target/s390x/helper.h‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -202,10 +202,6 @@ DEF_HELPER_FLAGS_4(gvec_vmlo16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
202202
DEF_HELPER_FLAGS_4(gvec_vmlo32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
203203
DEF_HELPER_FLAGS_3(gvec_vpopct8, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
204204
DEF_HELPER_FLAGS_3(gvec_vpopct16, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
205-
DEF_HELPER_FLAGS_4(gvec_verllv8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
206-
DEF_HELPER_FLAGS_4(gvec_verllv16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
207-
DEF_HELPER_FLAGS_4(gvec_verll8, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32)
208-
DEF_HELPER_FLAGS_4(gvec_verll16, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32)
209205
DEF_HELPER_FLAGS_4(gvec_verim8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
210206
DEF_HELPER_FLAGS_4(gvec_verim16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
211207
DEF_HELPER_FLAGS_4(gvec_vsl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32)

‎qemu/target/s390x/insn-data.def‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -798,7 +798,7 @@
798798
/* SQUARE ROOT */
799799
F(0xb314, SQEBR, RRE, Z, 0, e2, new, e1, sqeb, 0, IF_BFP)
800800
F(0xb315, SQDBR, RRE, Z, 0, f2, new, f1, sqdb, 0, IF_BFP)
801-
F(0xb316, SQXBR, RRE, Z, x2h, x2l, new, x1, sqxb, 0, IF_BFP)
801+
F(0xb316, SQXBR, RRE, Z, x2h, x2l, new_P, x1, sqxb, 0, IF_BFP)
802802
F(0xed14, SQEB, RXE, Z, 0, m2_32u, new, e1, sqeb, 0, IF_BFP)
803803
F(0xed15, SQDB, RXE, Z, 0, m2_64, new, f1, sqdb, 0, IF_BFP)
804804

@@ -1147,8 +1147,8 @@
11471147
/* VECTOR POPULATION COUNT */
11481148
F(0xe750, VPOPCT, VRR_a, V, 0, 0, 0, 0, vpopct, 0, IF_VEC)
11491149
/* VECTOR ELEMENT ROTATE LEFT LOGICAL */
1150-
F(0xe773, VERLLV, VRR_c, V, 0, 0, 0, 0, verllv, 0, IF_VEC)
1151-
F(0xe733, VERLL, VRS_a, V, la2, 0, 0, 0, verll, 0, IF_VEC)
1150+
F(0xe773, VERLLV, VRR_c, V, 0, 0, 0, 0, vesv, 0, IF_VEC)
1151+
F(0xe733, VERLL, VRS_a, V, la2, 0, 0, 0, ves, 0, IF_VEC)
11521152
/* VECTOR ELEMENT ROTATE AND INSERT UNDER MASK */
11531153
F(0xe772, VERIM, VRI_d, V, 0, 0, 0, 0, verim, 0, IF_VEC)
11541154
/* VECTOR ELEMENT SHIFT LEFT */

‎qemu/target/s390x/internal.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
1111
#define S390X_INTERNAL_H
1212

1313
#include "cpu.h"
14+
#include "fpu/softfloat.h"
1415

1516
#ifndef CONFIG_USER_ONLY
1617
QEMU_PACK(typedef struct LowCore {
@@ -268,7 +269,7 @@ uint32_t set_cc_nz_f128(float128 v);
268269
uint8_t s390_softfloat_exc_to_ieee(unsigned int exc);
269270
int s390_swap_bfp_rounding_mode(CPUS390XState *env, int m3);
270271
void s390_restore_bfp_rounding_mode(CPUS390XState *env, int old_mode);
271-
int float_comp_to_cc(CPUS390XState *env, int float_compare);
272+
int float_comp_to_cc(CPUS390XState *env, FloatRelation float_compare);
272273
uint16_t float32_dcmask(CPUS390XState *env, float32 f1);
273274
uint16_t float64_dcmask(CPUS390XState *env, float64 f1);
274275
uint16_t float128_dcmask(CPUS390XState *env, float128 f1);

‎qemu/target/s390x/translate.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3936,8 +3936,7 @@ static DisasJumpType op_risbg(DisasContext *s, DisasOps *o)
39363936
pmask = 0x00000000ffffffffull;
39373937
break;
39383938
default:
3939-
// g_assert_not_reached();
3940-
break;
3939+
g_assert_not_reached();
39413940
}
39423941

39433942
/* MASK is the set of bits to be inserted from R2.

‎qemu/target/s390x/translate_vx.inc.c‎

Lines changed: 17 additions & 92 deletions
Original file line numberDiff line numberDiff line change
@@ -233,8 +233,8 @@ static void get_vec_element_ptr_i64(TCGContext *tcg_ctx, TCGv_ptr ptr, uint8_t r
233233
#define gen_gvec_mov(tcg_ctx, v1, v2) \
234234
tcg_gen_gvec_mov(tcg_ctx, 0, vec_full_reg_offset(v1), vec_full_reg_offset(v2), 16, \
235235
16)
236-
#define gen_gvec_dup64i(tcg_ctx, v1, c) \
237-
tcg_gen_gvec_dup64i(tcg_ctx, vec_full_reg_offset(v1), 16, 16, c)
236+
#define gen_gvec_dup_imm(tcg_ctx, es, v1, c) \
237+
tcg_gen_gvec_dup_imm(tcg_ctx, es, vec_full_reg_offset(v1), 16, 16, c);
238238
#define gen_gvec_fn_2(tcg_ctx, fn, es, v1, v2) \
239239
tcg_gen_gvec_##fn(tcg_ctx, es, vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
240240
16, 16)
@@ -318,31 +318,6 @@ static void gen_gvec128_4_i64(TCGContext *tcg_ctx, gen_gvec128_4_i64_fn fn, uint
318318
tcg_temp_free_i64(tcg_ctx, cl);
319319
}
320320

321-
static void gen_gvec_dupi(TCGContext *tcg_ctx, uint8_t es, uint8_t reg, uint64_t c)
322-
{
323-
switch (es) {
324-
case ES_8:
325-
tcg_gen_gvec_dup8i(tcg_ctx, vec_full_reg_offset(reg), 16, 16, c);
326-
break;
327-
case ES_16:
328-
tcg_gen_gvec_dup16i(tcg_ctx, vec_full_reg_offset(reg), 16, 16, c);
329-
break;
330-
case ES_32:
331-
tcg_gen_gvec_dup32i(tcg_ctx, vec_full_reg_offset(reg), 16, 16, c);
332-
break;
333-
case ES_64:
334-
gen_gvec_dup64i(tcg_ctx, reg, c);
335-
break;
336-
default:
337-
g_assert_not_reached();
338-
}
339-
}
340-
341-
static void zero_vec(TCGContext *tcg_ctx, uint8_t reg)
342-
{
343-
tcg_gen_gvec_dup8i(tcg_ctx, vec_full_reg_offset(reg), 16, 16, 0);
344-
}
345-
346321
static void gen_addi2_i64(TCGContext *tcg_ctx, TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 al, TCGv_i64 ah,
347322
uint64_t b)
348323
{
@@ -400,8 +375,8 @@ static DisasJumpType op_vgbm(DisasContext *s, DisasOps *o)
400375
* Masks for both 64 bit elements of the vector are the same.
401376
* Trust tcg to produce a good constant loading.
402377
*/
403-
gen_gvec_dup64i(tcg_ctx, get_field(s, v1),
404-
generate_byte_mask(i2 & 0xff));
378+
gen_gvec_dup_imm(tcg_ctx, ES_64, get_field(s, v1),
379+
generate_byte_mask(i2 & 0xff));
405380
} else {
406381
TCGv_i64 t = tcg_temp_new_i64(tcg_ctx);
407382

@@ -437,7 +412,7 @@ static DisasJumpType op_vgm(DisasContext *s, DisasOps *o)
437412
}
438413
}
439414

440-
gen_gvec_dupi(tcg_ctx, es, get_field(s, v1), mask);
415+
gen_gvec_dup_imm(tcg_ctx, es, get_field(s, v1), mask);
441416
return DISAS_NEXT;
442417
}
443418

@@ -598,7 +573,7 @@ static DisasJumpType op_vllez(DisasContext *s, DisasOps *o)
598573

599574
t = tcg_temp_new_i64(tcg_ctx);
600575
tcg_gen_qemu_ld_i64(tcg_ctx, t, o->addr1, get_mem_index(s), MO_TE | es);
601-
zero_vec(tcg_ctx, get_field(s, v1));
576+
gen_gvec_dup_imm(tcg_ctx, es, get_field(s, v1), 0);
602577
write_vec_element_i64(tcg_ctx, t, get_field(s, v1), enr, es);
603578
tcg_temp_free_i64(tcg_ctx, t);
604579
return DISAS_NEXT;
@@ -917,7 +892,7 @@ static DisasJumpType op_vrepi(DisasContext *s, DisasOps *o)
917892
return DISAS_NORETURN;
918893
}
919894

920-
gen_gvec_dupi(tcg_ctx, es, get_field(s, v1), data);
895+
gen_gvec_dup_imm(tcg_ctx, es, get_field(s, v1), data);
921896
return DISAS_NEXT;
922897
}
923898

@@ -1414,7 +1389,7 @@ static DisasJumpType op_vcksm(DisasContext *s, DisasOps *o)
14141389
read_vec_element_i32(tcg_ctx, tmp, get_field(s, v2), i, ES_32);
14151390
tcg_gen_add2_i32(tcg_ctx, tmp, sum, sum, sum, tmp, tmp);
14161391
}
1417-
zero_vec(tcg_ctx, get_field(s, v1));
1392+
gen_gvec_dup_imm(tcg_ctx, ES_32, get_field(s, v1), 0);
14181393
write_vec_element_i32(tcg_ctx, sum, get_field(s, v1), 1, ES_32);
14191394

14201395
tcg_temp_free_i32(tcg_ctx, tmp);
@@ -1910,65 +1885,6 @@ static DisasJumpType op_vpopct(DisasContext *s, DisasOps *o)
19101885
return DISAS_NEXT;
19111886
}
19121887

1913-
static void gen_rll_i32(TCGContext *tcg_ctx, TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
1914-
{
1915-
TCGv_i32 t0 = tcg_temp_new_i32(tcg_ctx);
1916-
1917-
tcg_gen_andi_i32(tcg_ctx, t0, b, 31);
1918-
tcg_gen_rotl_i32(tcg_ctx, d, a, t0);
1919-
tcg_temp_free_i32(tcg_ctx, t0);
1920-
}
1921-
1922-
static void gen_rll_i64(TCGContext *tcg_ctx, TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
1923-
{
1924-
TCGv_i64 t0 = tcg_temp_new_i64(tcg_ctx);
1925-
1926-
tcg_gen_andi_i64(tcg_ctx, t0, b, 63);
1927-
tcg_gen_rotl_i64(tcg_ctx, d, a, t0);
1928-
tcg_temp_free_i64(tcg_ctx, t0);
1929-
}
1930-
1931-
static DisasJumpType op_verllv(DisasContext *s, DisasOps *o)
1932-
{
1933-
TCGContext *tcg_ctx = s->uc->tcg_ctx;
1934-
const uint8_t es = get_field(s, m4);
1935-
static const GVecGen3 g[4] = {
1936-
{ .fno = gen_helper_gvec_verllv8, },
1937-
{ .fno = gen_helper_gvec_verllv16, },
1938-
{ .fni4 = gen_rll_i32, },
1939-
{ .fni8 = gen_rll_i64, },
1940-
};
1941-
1942-
if (es > ES_64) {
1943-
gen_program_exception(s, PGM_SPECIFICATION);
1944-
return DISAS_NORETURN;
1945-
}
1946-
1947-
gen_gvec_3(tcg_ctx, get_field(s, v1), get_field(s, v2),
1948-
get_field(s, v3), &g[es]);
1949-
return DISAS_NEXT;
1950-
}
1951-
1952-
static DisasJumpType op_verll(DisasContext *s, DisasOps *o)
1953-
{
1954-
TCGContext *tcg_ctx = s->uc->tcg_ctx;
1955-
const uint8_t es = get_field(s, m4);
1956-
static const GVecGen2s g[4] = {
1957-
{ .fno = gen_helper_gvec_verll8, },
1958-
{ .fno = gen_helper_gvec_verll16, },
1959-
{ .fni4 = gen_rll_i32, },
1960-
{ .fni8 = gen_rll_i64, },
1961-
};
1962-
1963-
if (es > ES_64) {
1964-
gen_program_exception(s, PGM_SPECIFICATION);
1965-
return DISAS_NORETURN;
1966-
}
1967-
gen_gvec_2s(tcg_ctx, get_field(s, v1), get_field(s, v3), o->addr1,
1968-
&g[es]);
1969-
return DISAS_NEXT;
1970-
}
1971-
19721888
static void gen_rim_i32(TCGContext *tcg_ctx, TCGv_i32 d, TCGv_i32 a, TCGv_i32 b, int32_t c)
19731889
{
19741890
TCGv_i32 t = tcg_temp_new_i32(tcg_ctx);
@@ -2035,6 +1951,9 @@ static DisasJumpType op_vesv(DisasContext *s, DisasOps *o)
20351951
case 0x70:
20361952
gen_gvec_fn_3(tcg_ctx, shlv, es, v1, v2, v3);
20371953
break;
1954+
case 0x73:
1955+
gen_gvec_fn_3(tcg_ctx, rotlv, es, v1, v2, v3);
1956+
break;
20381957
case 0x7a:
20391958
gen_gvec_fn_3(tcg_ctx, sarv, es, v1, v2, v3);
20401959
break;
@@ -2067,6 +1986,9 @@ static DisasJumpType op_ves(DisasContext *s, DisasOps *o)
20671986
case 0x30:
20681987
gen_gvec_fn_2i(tcg_ctx, shli, es, v1, v3, d2);
20691988
break;
1989+
case 0x33:
1990+
gen_gvec_fn_2i(tcg_ctx, rotli, es, v1, v3, d2);
1991+
break;
20701992
case 0x3a:
20711993
gen_gvec_fn_2i(tcg_ctx, sari, es, v1, v3, d2);
20721994
break;
@@ -2084,6 +2006,9 @@ static DisasJumpType op_ves(DisasContext *s, DisasOps *o)
20842006
case 0x30:
20852007
gen_gvec_fn_2s(tcg_ctx, shls, es, v1, v3, shift);
20862008
break;
2009+
case 0x33:
2010+
gen_gvec_fn_2s(tcg_ctx, rotls, es, v1, v3, shift);
2011+
break;
20872012
case 0x3a:
20882013
gen_gvec_fn_2s(tcg_ctx, sars, es, v1, v3, shift);
20892014
break;

‎qemu/target/s390x/vec_fpu_helper.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -174,7 +174,7 @@ void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
174174
env->cc_op = wfc64(v1, v2, env, true, GETPC());
175175
}
176176

177-
typedef int (*vfc64_fn)(float64 a, float64 b, float_status *status);
177+
typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status);
178178
static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
179179
CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retaddr)
180180
{

‎qemu/target/s390x/vec_int_helper.c‎

Lines changed: 0 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -515,37 +515,6 @@ void HELPER(gvec_vpopct##BITS)(void *v1, const void *v2, uint32_t desc) \
515515
DEF_VPOPCT(8)
516516
DEF_VPOPCT(16)
517517

518-
#define DEF_VERLLV(BITS) \
519-
void HELPER(gvec_verllv##BITS)(void *v1, const void *v2, const void *v3, \
520-
uint32_t desc) \
521-
{ \
522-
int i; \
523-
\
524-
for (i = 0; i < (128 / BITS); i++) { \
525-
const uint##BITS##_t a = s390_vec_read_element##BITS(v2, i); \
526-
const uint##BITS##_t b = s390_vec_read_element##BITS(v3, i); \
527-
\
528-
s390_vec_write_element##BITS(v1, i, rol##BITS(a, b)); \
529-
} \
530-
}
531-
DEF_VERLLV(8)
532-
DEF_VERLLV(16)
533-
534-
#define DEF_VERLL(BITS) \
535-
void HELPER(gvec_verll##BITS)(void *v1, const void *v2, uint64_t count, \
536-
uint32_t desc) \
537-
{ \
538-
int i; \
539-
\
540-
for (i = 0; i < (128 / BITS); i++) { \
541-
const uint##BITS##_t a = s390_vec_read_element##BITS(v2, i); \
542-
\
543-
s390_vec_write_element##BITS(v1, i, rol##BITS(a, count)); \
544-
} \
545-
}
546-
DEF_VERLL(8)
547-
DEF_VERLL(16)
548-
549518
#define DEF_VERIM(BITS) \
550519
void HELPER(gvec_verim##BITS)(void *v1, const void *v2, const void *v3, \
551520
uint32_t desc) \

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